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78M6612-IMR/F 参数 Datasheet PDF下载

78M6612-IMR/F图片预览
型号: 78M6612-IMR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 单相,双插座电源和电能计量IC [Single-Phase, Dual-Outlet Power and Energy Measurement IC]
分类和应用: 插座
文件页数/大小: 111 页 / 1528 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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78M6612 Data Sheet  
DS_6612_001  
1.5.10 EEPROM Interface  
The 78M6612 provides hardware support for a two-pin or a three-pin EEPROM interface. The EEPROM  
interface uses the EECTRL and EEDATA registers for communication.  
1.5.10.1 Two-Pin EEPROM Interface  
The dedicated 2-pin serial interface communicates with external EEPROM devices. The interface is  
multiplexed onto pins DIO4 (SCK) and DIO5 (SDA) controlled by the I/O RAM bits DIO_EEX[1:0] (see  
the I/O RAM Table). Set DIO_EEX[1:0] = 01 to select the two-wire EEPROM interface. The MPU  
communicates with the interface through two SFR registers: EEDATA and EECTRL. If the MPU wishes to  
write a byte of data to EEPROM, it places the data in EEDATA and then writes the ‘Transmit’ command  
(CMD = 0011) to EECTRL. This initiates the transmit operation. The transmit operation is finished when  
the BUSY bit falls. Interrupt INT5 is also asserted when BUSY falls. The MPU can then check the  
RX_ACK bit to see if the EEPROM acknowledged the transmission.  
A byte is read by writing the Receive command (CMD[3:0] = 0001) to EECTRL and waiting for the BUSY  
bit to fall. Upon completion, the received data is in EEDATA. The serial transmit and receive clock is 78  
kHz during each transmission, and the clock is held in a high state until the next transmission. The bits  
in EECTRL are shown in Table 41.  
The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly  
(“bit-banging”). However, controlling DIO4 and DIO5 directly is discouraged, because it may tie  
up the MPU to the point where it may become too busy to process interrupts.  
Table 41: EECTRL Status Bits  
Read  
Status  
Bit  
Reset  
State  
Name  
/
Polarity Description  
Write  
7
6
5
4
ERROR  
BUSY  
R
R
R
R
0
0
1
1
Positive 1 when an illegal command is received.  
Positive 1 when serial data bus is busy.  
RX_ACK  
TX_ACK  
Negative 0 indicates that the EEPROM sent an ACK bit.  
Negative 0 indicates when an ACK bit has been sent to  
the EEPROM.  
CMD  
Operation  
0000  
No-op. Applying the no-op  
command will stop the I2C clock  
(SCK, DIO4). Failure to issue the  
no-op command will keep the SCK  
signal toggling.  
Positive,  
see  
CMD  
0001  
Receive a byte from EEPROM and  
send ACK.  
CMD[3:0]  
3-0  
W
0
0011  
0101  
Transmit a byte to EEPROM.  
Issue a ‘STOP’ sequence.  
Table  
0110  
Receive the last byte from  
EEPROM, do not send ACK.  
1001  
Issue a ‘START’ sequence.  
Others No Operation, set the ERROR bit.  
46  
Rev. 1.2  
 
 
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