DS_6612_001
78M6612 Data Sheet
Table 5: Internal Data Memory Map
Address
0xFF
0x80
Direct Addressing
Indirect Addressing
RAM
Special Function
Registers (SFRs)
0x7F
0x30
Byte-addressable area
0x2F
0x20
Bit-addressable area
0x1F
0x00
Register banks R0…R7
1.4.2 Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 6.
Table 6: Special Function Registers Locations
Byte-Addressable
Bit-
Address-
able
Hex\Bin
Hex/Bin
X000
INTBITS
B
X001
X010
X011
X100
X101
X110
X111
FF
F8
F0
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
98
90
88
80
F7
WDI
EF
E7
A
WDCON
PSW
DF
D7
CF
C7
T2CON
IRCON
IEN1
IP1
S0RELH S1RELH
FLSHCTL
S0RELL
USR2
BF
B7
AF
A7
9F
97
8F
87
FPAG
IEN0
P2
IP0
DIR2
S0BUF
DIR1
TMOD
SP
DIR0
S0CON
P1
IEN2
DPS
TL0
S1CON
S1BUF S1RELL EEDATA EECTRL
ERASE
TCON
P0
TL1
TH0
TH1
CKCON
DPL
DPH
DPL1
DPH1 WDTREL PCON
Only a few addresses are occupied, the others are not implemented. SFRs specific to the 78M6612 are
shown in bold print. Any read access to unimplemented addresses will return undefined data, while any
write access will have no effect. The registers at 0x80, 0x88, 0x90, etc., are bit-addressable, all others
are byte-addressable.
Rev. 1.2
19
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
