DS_8014R_012
73S8014R Data Sheet
CLKDIV1_from_uC
OFF_interrupt_to_uC
RSTIN_from_uC
See
note 5
I/OUC_to/from_uC
CLKDIV2_from_uC
VDD
VPC
R3
Rext2
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
OFF
RSTIN
I/OUC
VPC
CLKDIV2
CMDVCC
5V3V
GND
XTALIN
XTALOUT
CLKDIV1
PRES
VCC
100nF
C4
10uF
C5
CLK
See NOTE 2
GND
RST
I/O
VDD
VDD
See NOTE 1
VDDF_ADJ
TEST
C6
10
22pF C2
CRYSTAL
Y1
R1
100nF
CMDVCC_from_uC
Rext1
73S8014R
C3
See NOTE 4
22pF
5V/#V_select_from_uC
- OR -
See NOTE 3
External_clock_from uC
R2
47K
NOTES:
EMV & ISO7816=1uF
Low ESR (<100mohms) C1
should be placed near the SC
connecter contact
1) VDD = 2.7V to 5.5V DC.
2) VPC = 4.75V to 5.5V DC
VDD
C1
R4
3) Required if external clock from uP is used.
4) Required if crystal is used.
10K
Card detection
switch is
normally open
CLK track should be routed
far from RST, I/O, C4 and
Y1, C2 and C3 must be removed if external clock is used.
5) R1 and R3 are external resistors that adjust the VDD
fault voltage. Can be left open.
C8.
Smart Card Connector
Figure 3: 73S8014R – Typical Application Schematic
Rev. 1.0
15
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
