73S1217F Data Sheet
DS_1217F_002
External Interrupt Control Register (INT6Ctl): 0xFF95 Å 0x00
Table 60: The INT6Ctl Register
MSB
LSB
VFTIEN VFTINT I2CIEN I2CINT ANIEN ANINT
–
–
Bit
Symbol
Function
INT6Ctl.7
INT6Ctl.6
INT6Ctl.5
INT6Ctl.4
INT6Ctl.3
INT6Ctl.2
–
–
VFTIEN
VFTINT
I2CIEN
I2CINT
VDD fault interrupt enable.
VDD fault interrupt flag.
I2C interrupt enabled.
I2C interrupt flag.
If ANIEN = 1 Analog Compare event interrupt is enabled. When
masked (ANIEN = 0), ANINT (bit 0) may be set, but no interrupt is
generated.
INT6Ctl.1
INT6Ctl.0
ANIEN
ANINT
(Read Only) Set when the selected ANA_IN signal changes with
respect to the selected threshold if Compare_Enable is asserted.
Cleared on read of register.
58
Rev. 1.2