73S1217F Data Sheet
DS_1217F_002
There are 3 sets of registers to load the RTC 24-bit accumulator, 32-bit counter and 23-bit trim registers.
The registers are loaded when the RTCLD bit is set in RTCCtl.
Table 55: The 32-bit RTC Counter
Register
Register
Register
RTCCnt3
RTCCnt2
RTCCnt1
RTCCnt0
RTCCnt[31:24]
RTCCnt[23:16]
RTCCnt[15:8]
RTCCnt[7:0]
Table 56: The 24-bit RTC Accumulator
RTCACC2
RTCACC1
RTCACC [15:8]
RTCACC0
RTCACC [23:16]
RTCACC [7:0]
Table 57: The 24-bit RTC Trim (sign magnitude value)
RTCTrim2
RTCTrim1
RTCTrim0
RTCTrim [23:16]
RTCTrim [15:8]
RTCTrim [7:0]
External Interrupt Control Register (INT5Ctl): 0xFF94 Å 0x00
Table 58: The INT5Ctl Register
MSB
LSB
PDMUX
–
RTCIEN RTCINT USBIEN USBINT KPIEN KPINT
Bit
Symbol
PDMUX
–
Function
INT5Ctl.7
INT5Ctl.6
Power down multiplexer control.
When set =1, enables RTC interrupt. Note: The RTC based watchdog will
be enabled when set.
INT5Ctl.5
INT5Ctl.4
RTCIEN
RTCINT
When set =1, indicates interrupt from Real Time Clock function. Cleared
on read of register.
INT5Ctl.3
INT5Ctl.2
INT5Ctl.1
INT5Ctl.0
USBIEN
USBINT
KPIEN
USB interrupt enable.
USB interrupt flag.
Keypad interrupt enable.
Keypad interrupt flag.
KPINT
56
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
