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73S1217F-IMR/F 参数 Datasheet PDF下载

73S1217F-IMR/F图片预览
型号: 73S1217F-IMR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 总线供电80515的系统级芯片, USB , ISO 7816 / EMV ,密码键盘和更多 [Bus-Powered 80515 System-on-Chip with USB, ISO 7816 / EMV, PINpad and More]
分类和应用: 多功能外围设备微控制器和处理器时钟
文件页数/大小: 140 页 / 1066 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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73S1217F Data Sheet  
DS_1217F_002  
Parameter  
Condition  
Min  
Typ.  
Max  
Unit  
CL = 50pf, series 24Ω, 1% source termination resistor included  
Rise Time  
USBTR  
USBTF  
TRFM  
10% to 90%  
90% to 10%  
4
4
20  
20  
ns  
ns  
%
Fall Time  
Rise/fall time matching  
(USBTR/USBTF)  
90  
111.11  
Output signal crossover  
voltage  
VCRS  
TDJ1  
Includes VDI range  
1.3  
-3.5  
-4  
2.0  
3.5  
4
V
Source Jitter to Next  
Transition  
Measured as in Figure 7-  
49 of USB 2.0 Spec  
ns  
ns  
Source Jitter For Paired  
Transitions  
Measured as in Figure 7-  
49 of USB 2.0 Spec (1) (2)  
TDJ2  
Receiver Jitter to Next  
Transition  
Measure as in Figure 7-51  
of USB 2.0 Spec.  
TJR1  
TJR2  
-18.5  
-9  
18.5  
ns  
ns  
Characterized but not  
production tested.  
Receiver Jitter for Paired  
Transitions  
Measure as in Figure 7-51  
of USB 2.0 Spec.  
9
Characterized but not  
production tested.  
Source SE0 interval of  
EOP  
Figure 7-50 of USB 2.0  
Spec  
TEOPT  
TEOPR  
160  
82  
175  
ns  
ns  
Receiver SEO interval of  
EOP  
Figure 7-50 of USB 2.0  
Spec. (3)  
(1) For both transitions of differential signaling.  
(2) Excluding first transition from the Idle state.  
(3) Must accept as valid EOP.  
120  
Rev. 1.2  
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