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73S1215F-68IMR/F 参数 Datasheet PDF下载

73S1215F-68IMR/F图片预览
型号: 73S1215F-68IMR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 80515系统级芯片, USB , ISO 7816 / EMV ,密码键盘和更多 [80515 System-on-Chip with USB, ISO 7816 / EMV, PINpad and More]
分类和应用: 多功能外围设备微控制器和处理器外围集成电路时钟
文件页数/大小: 136 页 / 1028 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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DS_1215F_003  
73S1215F Data Sheet  
1.7.12 Keypad Interface  
The 73S1215F supports a 30-button (6 row x 5 column) keypad (SPST Mechanical Contact Switches)  
interface using 11 dedicated I/O pins.  
Figure 12 shows a simplified block diagram of the keypad interface.  
KORDERL / H Registers  
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
VDD  
COL4:0  
Keypad Clock  
Column Value  
Scan  
5
7
6
5
4
3
2
1
0
KCOL Register(1)  
VDD  
KSIZE Register  
7
6
5
4
3
2
1
0
Keypad Clock  
Row Value  
6
Debouncing  
7
6
5
4
3
2
1
0
KROW Register  
Hardware Scan Enable  
If smaller keypad than 6 x 5 is to be  
implemented, unused row inputs  
should be connected to VDD. Unused  
column outputs should be left  
unconnected.  
7
6
5
4
3
2
1
0
6
(1) KCOL is normally used as Read only  
register. When hardware keyscan mode  
is disabled, this register is to be used by  
firmware to write the column data to  
handle firmware scanning.  
(2) 1kHz internal clock signal can be  
selected either from the PLL (= from the  
12MHz main clock), or from the 32kHz  
system clock.  
KSTAT Register  
0
1
2
3
4
5
6
7
KSCAN Register  
1kHz (2)  
Dividers  
73S1215F  
Figure 12: Simplified Keypad Block Diagram  
There are 5 drive lines (outputs) corresponding to columns and 6 sense lines (inputs) corresponding to  
rows. Hysteresis and pull-ups are provided on all inputs (rows), which eliminate the need for external  
resistors in the keypad. Key scanning happens by asserting one of the 5 column lines low and looking for  
a low on a sense line indicating that a key is pressed (switch closed) at the intersection of the drive/sense  
(col/row) line in the keypad. Key detection is performed by hardware with an incorporated debounce  
timer. Debouncing time is adjustable through the KSCAN register. Internal hardware circuitry performs  
column scanning at an adjustable scanning rate and column scanning order through registers KSCAN  
and KORDERL / KORDERH. Key scanning is disabled at reset and must be enabled by firmware. When  
a valid key is detected, an interrupt is generated and the valid value of the pressed key is automatically  
written into KCOL and KROW registers. The keypad interface uses a 1kHz clock derived from either the  
Rev. 1.4  
65  
 
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