DS_1210F_001
73S1210F Data Sheet
1.7.2 Power Supply Management
The detailed power supply management logic block diagram is shown in Figure 5.
VBUS
+
-
VBUSTH
NO
NC
VPC
VBAT
DC-DC
Converter
SET
CLR
EN
/ Pass
S
R
Q
Q
Through*
LIN
VP
*Pass Through -> VP = VPC
SET
CLR
D
Q
Q
ON_OFF
Debounce
Circuit
OFF_REQ
INT
INT3
VP
Delay
Circuit
(POR)
MPU
PWRDN*
*PWRDN bit in MISCtl0
Pass Through
Mode Enable
VCC Voltage
Select
Smart
Card
Power
VCC
VDD
VCC
Regulator
VCC Enable
Power
Control
To optional
external
VDD
circuits
Regulator
20mA max.
VDD to
Internal
Circuits
Figure 5: Detailed Power Management Logic Block Diagram
The 73S1210F contains a power supply and converter circuit that takes power from any one of three
sources; VPC, VBUS, or VBAT
.
VPC is specified to range from 2.7 to 6.5 volts. It can typically be supplied by a single cell battery with a
voltage range of 2.7 to approximately 3.1 volts or by a standard supply of 3.3 or 5 volts.
VBUS is typically supplied by an external power supply and ranges in value from 4.4 to 5.5 volts (6.5V maximum).
Rev. 1.4
25
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
