73S1210F Data Sheet
DS_1210F_001
1 Hardware Description
1.1
Pin Description
Table 1: 73S1210 Pinout Description
Pin (68 QFN)
Pin (44 QFN)
Equivalent
Circuit*
Figure 28
Pin Name
Description
Type
X12IN
X12OUT
ROW(5:0)
0
1
2
3
4
5
COL(4:0)
0
1
2
3
4
USR(7:0)
0
1
2
3
4
5
6
7
SCL
10
11
21
22
24
33
36
37
9
10
I
O
I
MPU clock crystal oscillator input pin. A 1MΩ
resistor is
required between pins X12IN and X12OUT.
MPU clock crystal oscillator output pin.
Keypad row input sense.
O
12
13
14
16
19
IO
35
34
32
31
30
29
23
20
5
22
21
20
19
18
17
14
13
6
Keypad column output scan pins.
General-purpose user pins, individually configurable as
inputs or outputs or as external input interrupt ports.
O
I
2
C (master mode) compatible Clock signal. Note: the pin
is configured as an open drain output. When the I2C
interface is being used, an external pull up resistor is
required. A value of 3K is recommended.
I
2
C (master mode) compatible data I/O. Note: this pin is bi-
directional. When the pin is configured as output, it is an
open drain output. When the I2C interface is being used,
an external pull up resistor is required. A value of 3K is
recommended.
Serial UART Receive data pin.
Serial UART Transmit data pin.
General purpose interrupt input.
General purpose interrupt input.
IO data signal for use with external Smart Card interface
circuit such as 73S8010.
Clock signal for use with external Smart Card interface
circuit.
Rev. 1.4
SDA
6
7
IO
RXD
TXD
INT3
INT2
SIO
SCLK
17
18
48
49
47
45
11
12
30
31
29
28
I
O
I
I
IO
O
8
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
