DS_1210F_001
73S1210F Data Sheet
RESET
ANA_IN
VBUS
RXTX
ERST
TEST
TCLK
GND
GND
ISBR
TBUS3
TBUS2
TBUS1
TBUS0
SEC
VBAT
VPC
LIN
VP
ON_OFF
ICE INTERFACE
VDD
PLL
and
TIMEBASES
VOLTAGE REFERENCE
AND FUSE TRIM
CIRCUITRY
VPD REGULATOR
POWER
REGULATION
AND VCC
CONTROL
LOGIC
OFF_REQ
VDD
VCC
GND
X12IN
X12OUT
VDD
12MHz
OSCILLATOR
RST
CLK
OCDSI
SMART CARD LOGIC
ISO UART and CLOCK GENERATOR
GND
FLASH/ROM
PROGRAM
MEMORY
32KB
MEMORY_
CONTROL
CONTROL
UNIT
SMART
CARD
ISO
INTERFACE
I/O
AUX1
AUX2
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
COL0
COL1
COL2
COL3
COL4
KEYPAD
INTERFACE
RAM_
SFR_
CONTROL
SCRATCH
IRAM
256B
TIMER_0_1
PRES
FLASH
INTERFACE
CORE
ALU
WATCH-
DOG
TIMER
EXTERNAL
SMART
CARD
INTERFACE
SCLK
SIO
PMU
DATA
XRAM
2KB
PORTS
ISR
SERIAL
INT2
INT3
SCL
SDA
USR0
USR1
USR2
USR3
USR4
USR5
USR6
USR7
I
2
C
MASTER
INT.
USR(8:0)
DRIVERS
GND
RXD
TXD
PERIPHERAL
INTERFACE
and SFR LOGIC
LED
DRIVER
Pins available on both 68 and 44-pin packages.
Pins only available on 68-pin package.
Figure 1: IC Functional Block Diagram
Rev. 1.4
LED0
7
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
