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73K324BL-IH/F 参数 Datasheet PDF下载

73K324BL-IH/F图片预览
型号: 73K324BL-IH/F
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片调制解调器瓦特/集成混合 [Single-Chip Modem w/ Integrated Hybrid]
分类和应用: 调制解调器电信集成电路电信电路
文件页数/大小: 34 页 / 205 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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73K324BL  
CCITT V.22bis,V.23,V.22,V.21, Bell 212A  
Single-Chip Modem w/ Integrated Hybrid  
DATA SHEET  
DETECT REGISTER  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
DR  
010  
RECEIVE  
LEVEL  
INDICATOR  
S1  
PATTERN  
DETECT  
RECEIVE UNSCR.  
CARR.  
DETECT  
SPECIAL  
TONES  
DETECT DETECT INDICATOR  
CALL  
PROG.  
SIGNAL  
QUALITY  
DATA  
MARK  
DETECT  
BIT  
NAME  
CONDITION  
DESCRIPTION  
D0  
Signal Quality  
Indicator  
0
1
Indicates normal received signal.  
Indicates low received signal quality (above average  
error rate). Interacts with Special Register bits D2, D1.  
D1  
D2  
Call Progress  
Detect  
0
1
No call progress tone detected.  
Indicates presence of call progress tones. The call  
progress detection circuitry is activated by energy in the  
normal 350 to 620 Hz call progress bandwidth.  
Special Tone  
Detect  
0
1
Condition not detected.  
Condition detected  
CR0 D0  
TR D0  
CR2 D5  
1
1
0
1
1
2225 Hz ±10 Hz answer tone detected in V.22bis, V.22  
modes.  
1
2100 Hz ±21 Hz answer tone detected in V.22 bis, V.22  
modes.  
0
1
X
X
0
0
900 Hz SCT tone detected in V.23 mode.  
2100 Hz or 2225 Hz answer tone detected in QAM,  
DPSK mode  
D3  
D4  
Carrier Detect  
0
1
No carrier detected in the receive channel.  
Indicated carrier has been detected in the received  
channel.  
Unscrambled  
Mark Detect  
0
1
No unscrambled mark.  
Indicates detection of unscrambled marks in the received  
data. Should be time qualified by software.  
D5  
D6  
Receive Data  
Continuously outputs the received data stream. This data  
is the same as that output on the RXD pin, but it is not  
disabled when RXD is tri-stated.  
S1 Pattern  
Detect  
0
1
No S1 pattern being received.  
S1 pattern detected. Should be time qualified by  
software. S1 pattern is defined as a double di-bit  
(001100..) unscrambled 1200 bps DPSK signal. Pattern  
must be aligned with baud clock to be detected.  
D7  
Receive Level  
Indicator  
0
1
Received signal level below threshold, (typical@-25dBm0);  
can use receive gain boost (+18 dB).  
Received signal above threshold.  
Page: 14 of 34  
© 2005, 2008 TERIDIAN Semiconductor Corporation  
Rev 6.1  
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