73K222BL
V.22, V.21, Bell 212A, 103 Single-Chip
Modem with Integrated Hybrid
DATA SHEET
CONTROL REGISTER 1 (continued)
D7
D6
D5
D4
D3
D2
D1
D0
CR1
001
TRANSMIT TRANSMIT
ENABLE
DETECT
INTER.
BYPASS
CLK
TEST
MODE
1
TEST
MODE
0
PATTERN
1
PATTERN
0
SCRAMB.
CONTROL
RESET
BIT NO.
NAME
CONDITION
DESCRIPTION
D4
D5
Bypass
Scrambler
0
Selects normal operation. DPSK data is passed
through scrambler.
Enable Detect
1
Selects Scrambler Bypass. Bypass DPSK data is
routed around scrambler in the transmit path.
0
1
Disables interrupt at INT pin.
Enables INT output. An interrupts will be generated
with a change in status of DR bits D1-D4. The answer
tone and call progress detect interrupts are masked
when the TX enable bit is set. Carrier detect is
masked when TX DTMF is activated. All interrupts will
be disabled if the device is in power-down mode.
D7, D6
Transmit
Pattern
D7
0
D6
0
Selects normal data transmission as controlled by the
state of the TXD pin.
0
1
Selects an alternating mark/space transmit pattern for
modem testing.
1
1
0
1
Selects a constant mark transmit pattern.
Selects a constant space transmit pattern.
DETECT REGISTER
D7
D6
D5
D4
D3
D2
D1
D0
DR
010
X
X
RECEIVE
DATA
UNSCR.
MARK
CARR.
DETECT
ANSWER
TONE
CALL
PROG.
LONG
LOOP
BIT NO.
NAME
CONDITION
DESCRIPTION
D0
Long Loop
0
1
0
1
Indicates normal received signal.
Indicates low received signal level.
No call progress tone detected.
D1
Call Progress
Detect
Indicates presence of call progress tones. The call
progress detection circuitry is activated by energy in
the 350 to 620 Hz call progress band.
Page: 11 of 26
© 2005, 2008 TERIDIAN Semiconductor Corporation
Rev 7.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
