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71M6515H-IGTW1 参数 Datasheet PDF下载

71M6515H-IGTW1图片预览
型号: 71M6515H-IGTW1
PDF下载: 下载PDF文件 查看货源
内容描述: 截至10ppmC精密超稳定的电压基准数字温度补偿 [Up to 10ppmC precision ultra-stable voltage reference Digital temperature compensation]
分类和应用: 温度补偿
文件页数/大小: 60 页 / 827 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6515H  
A Maxim Integrated Products Brand  
Energy Meter IC  
DATA SHEET  
JULY 2011  
The pin PULSE_INIT determines the logic level applied to the pulse pins on power-up, i.e. with PULSE_INIT low, the pulse  
pins will be initialized to low (default = 1).  
The pulse width PW is controlled with the PULSEWIDTH register for the PULSER and PULSEW output pins per the following  
formula:  
2 PULSEWIDTH +1  
P =  
W
2520.6  
The PULSE3 and PULSE4 output pins will always generate pulses with 50% duty cycle.  
Internal Data (Directly by CE)  
Accumulation Interval  
CE Operations  
Accumulation 1  
Accumulation 2  
Accumulation 3  
XFER  
Post 0  
READY  
XFER  
Post 1  
READY  
XFER  
Post 2  
READY  
Post Processing  
Pulse Generator  
Pulse 0  
Pulse 1  
Pulse 2  
Post-Processed Data  
CE Operations  
Accumulation Interval  
Accumulation 1  
Accumulation 2  
Accumulation 3  
XFER  
Post 0  
READY  
XFER  
Post 1  
READY  
XFER  
Post 2  
READY  
Post Processing  
APULSE write  
Pulse -1  
APULSE write  
Pulse 0  
APULSE write  
Pulse 1  
Pulse Generator  
External (Host data is transferred to the pulse generator in the first accumulation interval after the  
next READY)  
Accumulation Interval  
CE Operations  
Post Processing  
Host Processing  
Pulse Generator  
Accumulation 1  
Accumulation 2  
Accumulation 3  
XFER  
Post 0  
READY  
XFER  
Post 1  
READY  
XFER  
Post 2  
READY  
Host 0  
APULSE write  
Host 1  
APULSE write  
Host 2  
APULSE write  
Pulse -2  
Pulse -1  
Pulse 0  
Figure 8: Pulse Generator Timing  
Page: 19 of 60  
© 20052011 Teridian Semiconductor Corporation  
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