71M6533/71M6534 Data Sheet
FDS_6533_6534_004
Table 9: Special Function Register Map
Byte Addressable
Bit
Hex/
Bin
Bin/
Hex
Addressable
X000
INTBITS
B
X001
X010
X011
X100
X101
X110
X111
F8
F0
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
98
90
88
80
FF
F7
EF
E7
DF
D7
CF
C7
IFLAGS
A
WDCON
PSW
T2CON
IRCON
IEN1
P3
IP1
S0RELH
FLSHCTL
S0RELL
DIR0
S1RELH
S1CON
PDATA
FL_BANK PGADR
BF
B7
AF
A7
9F
97
IEN0
P2
IP0
DIR2
S0BUF
DIR1
TMOD
SP
S0CON
P1
IEN2
S1BUF S1RELL EEDATA EECTRL
DPS
ERASE
TCON
P0
TL0
TL1
TH0
TH1
CKCON
8F
87
DPL
DPH
DPL1
DPH1
PCON
1.3.3 Generic 80515 Special Function Registers
Table 10 shows the location, description and reset or power-up value of the generic 80515 SFRs. Addi-
tional descriptions of the registers can be found at the page numbers listed in the table.
Table 10: Generic 80515 SFRs - Location and Reset Values
Address Reset value
Name
P0
Description
Page
(Hex)
(Hex)
0x80
0xFF
Port 0
24
24
24
24
24
24
28
32
29
29
29
29
29
24
20
28
26
31
28
SP
0x81
0x82
0x83
0x84
0x85
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
0x8E
0x92
0x98
0x99
0x9A
0x9B
0x07
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x01
0x00
0x00
0x00
0x00
0x00
Stack Pointer
DPL
Data Pointer Low 0
DPH
Data Pointer High 0
DPL1
DPH1
PCON
TCON
TMOD
TL0
Data Pointer Low 1
Data Pointer High 1
UART Speed Control, Idle and Stop mode Control
Timer/Counter Control
Timer Mode Control
Timer 0, low byte
TL1
Timer 1, high byte
TH0
Timer 0, low byte
TH1
Timer 1, high byte
CKCON
DPS
Clock Control (Stretch=1)
Data Pointer select Register
Serial Port 0, Control Register
Serial Port 0, Data Buffer
Interrupt Enable Register 2
Serial Port 1, Control Register
S0CON
S0BUF
IEN2
S1CON
22
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v1.1
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