欢迎访问ic37.com |
会员登录 免费注册
发布采购

71M6521DE-IGT/F 参数 Datasheet PDF下载

71M6521DE-IGT/F图片预览
型号: 71M6521DE-IGT/F
PDF下载: 下载PDF文件 查看货源
内容描述: 电能计量IC [Energy Meter IC]
分类和应用: 模拟IC信号电路
文件页数/大小: 101 页 / 1677 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
 浏览型号71M6521DE-IGT/F的Datasheet PDF文件第37页浏览型号71M6521DE-IGT/F的Datasheet PDF文件第38页浏览型号71M6521DE-IGT/F的Datasheet PDF文件第39页浏览型号71M6521DE-IGT/F的Datasheet PDF文件第40页浏览型号71M6521DE-IGT/F的Datasheet PDF文件第42页浏览型号71M6521DE-IGT/F的Datasheet PDF文件第43页浏览型号71M6521DE-IGT/F的Datasheet PDF文件第44页浏览型号71M6521DE-IGT/F的Datasheet PDF文件第45页  
71M6521DE/71M6521FE  
Energy Meter IC  
DATASHEET  
JANUARY 2008  
The PB pin is a dedicated digital input. In addition, if the optical UART is not used, OPT_TX and OPT_RX can be configured  
as dedicated DIO pins. Thus, in addition to the 16 general-purpose DIO pins (DIO4…DIO11, DIO14…DIO21), there are three  
additional pins that can be used for digital input and output.  
71M6521  
71M6521  
V3P3SYS  
V3P3SYS  
VBAT  
3.3V  
3.3V  
VBAT  
LED  
V3P3D  
V3P3D  
DIO1  
DIO1  
R
LED  
R
DGND  
DGND  
Not recommended  
Recommended  
Figure 8: Connecting an External Load to DIO Pins  
DIO_R Value  
Resource Selected for DIO Pin  
NONE  
0
1
2
3
4
5
6
7
Reserved  
T0 (counter0 clock)  
T1 (counter1 clock)  
High priority I/O interrupt (INT0 rising)  
Low priority I/O interrupt (INT1 rising)  
High priority I/O interrupt (INT0 falling)  
Low priority I/O interrupt (INT1 falling)  
Table 56: Selectable Controls using the DIO_DIR Bits  
LCD Drivers  
The device in the 68-pin QFN package contains 20 dedicated LCD segment drivers in addition to the 18 multi-use pins  
described above. Thus, the device is capable of driving between 80 to 152 pixels of LCD display with 25% duty cycle (or 60 to  
114 pixels with 33% duty cycle). At eight pixels per digit, this corresponds to 10 to 19 digits.  
The device in the 64-pin LQFP package contains 20 dedicated LCD segment drivers in addition to the 15 multi-use pins  
described above. Thus, the device is capable of driving between 80 to 140 pixels of LCD display with 25% duty cycle (or 60 to  
105 pixels with 33% duty cycle). At eight pixels per digit, this corresponds to 10 to 17 digits.  
The LCD drivers are grouped into four commons and up to 38 segment drivers (68-pin package), or 4 commons and 35  
segment drivers (64-pin package). The LCD interface is flexible and can drive either digit segments or enunciator symbols.  
Segment drivers SEG18 and SEG19 can be configured to blink at either 0.5Hz or 1Hz. The blink rate is controlled by LCD_Y.  
There can be up to four pixels/segments connected to each of these drivers. LCD_BLKMAP18[3:0] and LCD_BLKMAP19[3:0]  
identify which pixels, if any, are to blink.  
v1.0  
© 2005-2008 TERIDIAN Semiconductor Corporation  
Page: 41 of 101  
 
 
 
 复制成功!