欢迎访问ic37.com |
会员登录 免费注册
发布采购

71M6521BE-IGTR/F 参数 Datasheet PDF下载

71M6521BE-IGTR/F图片预览
型号: 71M6521BE-IGTR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 电能计量IC [Energy Meter IC]
分类和应用:
文件页数/大小: 97 页 / 1586 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
 浏览型号71M6521BE-IGTR/F的Datasheet PDF文件第19页浏览型号71M6521BE-IGTR/F的Datasheet PDF文件第20页浏览型号71M6521BE-IGTR/F的Datasheet PDF文件第21页浏览型号71M6521BE-IGTR/F的Datasheet PDF文件第22页浏览型号71M6521BE-IGTR/F的Datasheet PDF文件第24页浏览型号71M6521BE-IGTR/F的Datasheet PDF文件第25页浏览型号71M6521BE-IGTR/F的Datasheet PDF文件第26页浏览型号71M6521BE-IGTR/F的Datasheet PDF文件第27页  
71M6521BE  
Energy Meter IC  
DATA SHEET  
JANUARY 2008  
The 71M6521BE has several UART-related registers for the control and buffering of serial data. All UART transfers are pro-  
grammable for parity enable, parity, 2 stop bits/1 stop bit and XON/XOFF options for variable communication baud rates from  
300 to 38400 bps. Table 12 shows how the baud rates are calculated. Table 13 shows the selectable UART operation modes.  
Using Timer 1  
2SMOD * fCKMPU/ (384 * (256-TH1))  
N/A  
Using Internal Baud Rate Generator  
2SMOD * fCKMPU/(64 * (210-S0REL))  
UART0  
UART1  
f
CKMPU/(32 * (210-S1REL))  
Note: S0REL and S1REL are 10-bit values derived by combining bits from the respective timer reload registers. SMOD is the SMOD bit in the  
SFR PCON. TH1 is the high byte of timer 1.  
Table 12: Baud Rate Generation  
UART 0  
UART 1  
Start bit, 8 data bits, parity, stop bit, variable baud  
rate (internal baud rate generator)  
Mode 0  
Mode 1  
Mode 2  
N/A  
Start bit, 8 data bits, stop bit, variable baud  
rate (internal baud rate generator or timer 1)  
Start bit, 8 data bits, stop bit, variable baud rate  
(internal baud rate generator)  
Start bit, 8 data bits, parity, stop bit, fixed  
baud rate 1/32 or 1/64 of fCKMPU  
N/A  
Start bit, 8 data bits, parity, stop bit, variable  
baud rate (internal baud rate generator or  
timer 1)  
Mode 3  
N/A  
Table 13: UART Modes  
Parity of serial data is available through the P flag of the accumulator. Seven-bit serial modes with parity, such as  
those used by the FLAG protocol, can be simulated by setting and reading bit 7 of 8-bit output data. Seven-bit serial  
modes without parity can be simulated by setting bit 7 to a constant 1. 8-bit serial modes with parity can be simulated  
by setting and reading the 9th bit, using the control bits TB80 (S0CON.3) and TB81 (S1CON.3) in the S0CON and S1CON  
SFRs for transmit and RB81 (S1CON.2) for receive operations. SM20 (S0CON.5) and SM21 (S1CON.5) can be used as  
handshake signals for inter-processor communication in multi-processor systems.  
Serial Interface 0 Control Register (S0CON).  
The function of the UART0 depends on the setting of the Serial Port Control Register S0CON.  
MSB  
LSB  
SM0  
SM1  
SM20  
REN0  
TB80  
RB80  
TI0  
RI0  
Table 14: The S0CON Register  
Serial Interface 1 Control Register (S1CON).  
The function of the serial port depends on the setting of the Serial Port Control Register S1CON.  
MSB  
LSB  
SM  
-
SM21  
REN1  
TB81  
RB81  
TI1  
RI1  
Table 15: The S1CON register  
V1.0  
© 2005-2008 TERIDIAN Semiconductor Corporation  
Page: 23 of 97