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71M6515H-IGTR/F 参数 Datasheet PDF下载

71M6515H-IGTR/F图片预览
型号: 71M6515H-IGTR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 电能计量IC [Energy Meter IC]
分类和应用:
文件页数/大小: 57 页 / 685 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6515H  
Energy Meter IC  
DATA SHEET  
MARCH 2008  
Y_DEG0 (0x18)  
This register holds the constant compensation factor for the RTC temperature compensation. One LSB is equivalent to  
0.1PPM.  
Bits 31-16: These bits (Y_CALC0) represent the constant compensation factor.  
Y_DEG1_2 (0x19)  
This register holds the linear and quadratic compensation factors for the RTC temperature compensation.  
31  
Y_CALC1 = linear compensation factor. One LSB is equi- Y_CALC2 = quadratic compensation factor. One LSB is  
valent to 0.01PPM/° equivalent to 0.001PPM/°C  
16 15  
0
Both Y_DEG0 and Y_DEG1_2 can be used to compensate the RTC to be accurate over the whole temperature range by  
characterizing the crystal.  
Registers for Output Signals  
PULSEW_R_CNTS (0x41)  
This register contains the pulse count for the PULSEW and PULSER output pins for the past accumulation interval. The  
counters will be cleared at the beginning of each accumulation interval and then start counting up with each generated pulse.  
Bit 15-0: The counter for the PULSER (VARh) generator.  
Bit 31-16: The counter for the PULSEW (Wh) generator.  
31  
16 15  
Counter for the PULSER generator (VARh)  
0
Counter for the PULSEW generator (Wh)  
At pulse rates that do not result in generation of whole counts per accumulation interval, e.g. 3 1/3 pulses, the count equivalent  
to the next lower natural number will be generated until the residue accumulates to a full count, i.e. the pulse sequence  
generated will be 3, 3, 3, 4, 3, 3, 3, 4…  
PULSE3_4_CNTS (0x42)  
This register contains the pulse count for the PULSE3 and PULSE4 output pins for the accumulation interval. The counters  
will be cleared at the beginning of each accumulation interval and then start counting up with each generated pulse.  
Bit 15-0: The counter for the PULSE4 generator.  
Bit 31-16: The counter for the PULSE3 generator.  
31  
16 15  
Counter for the PULSE4 generator  
0
Counter for the PULSE3 generator  
IASQSUM (0x39), IBSQSUM (0x3A), ICSQSUM (0x3B)  
These registers hold the sum of the squared current samples collected during the previous accumulation interval. The  
values for IASQSUM, IBSQSUM, and ICSQSUM are provided directly by the CE and are not post-processed. The magnitude  
of the accumulated samples is determined by:  
IMAX 2  
In _ 82  
LSB =  
9.40451013 A2 h  
Page: 40 of 57  
© 2005-2008 TERIDIAN Semiconductor Corporation  
V1.4  
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