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71M6513-IGT/F 参数 Datasheet PDF下载

71M6513-IGT/F图片预览
型号: 71M6513-IGT/F
PDF下载: 下载PDF文件 查看货源
内容描述: [Analog Circuit,]
分类和应用:
文件页数/大小: 104 页 / 1320 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6513/71M6513H  
3-Phase Energy Meter IC  
A Maxim Integrated Products Brand  
DATA SHEET  
AUGUST 2011  
Name  
RTM0  
RTM1  
RTM2  
RTM3  
Addr  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
RTM Probes:  
RTM0[7:0]  
2060  
2061  
2062  
2063  
RTM1[7:0]  
RTM2[7:0]  
RTM3[7:0]  
Synchronous Serial Interface:  
SSI_EN  
SSI_10M  
SSI_CKGATE  
SSI_FSIZE[1:0]  
SSI_BEG[7:0]  
SSI_END[7:0]  
SSI_FPOL  
SSI_RDYEN SSI_RDYPOL  
SSI  
2070  
2071  
S S I _ B E G  
SSI_END 2072  
Fuse Selection Registers:  
TRIMSEL[7:0]  
TRIMSEL 20FD  
TRIM[7:0]  
TRIM  
20FF  
SFR MAP (SFRs Specific to Teridian 80515) – In Numerical Order  
‘Not Used’ bits are blacked out and contain no memory and are read by the MPU as zero. RESERVED bits are in use and  
should not be changed. This table lists only the SFR registers that are not generic 8051 SFR registers.  
SFR  
Addr  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Digital I/O:  
DIO_0[7:0]  
DIO_DIR0[7:0]  
DIO_1[7:0]  
(Port 0)  
P0  
DIR0  
P1  
DIR1  
P2  
80  
A2  
90  
91  
A0  
A1  
(Port 1)  
(Port 2)  
DIO_DIR1[7:0]  
DIO_2[5:0]  
DIO_DIR2[5:0]  
DIR2  
Interrupts and WD Timer:  
INT6  
INT5  
INT4  
INT3  
INT2  
INT1  
IE_RTC  
INT0  
INTBITS  
WDI  
F8  
E8  
WD_RST  
IE_XFER  
Flash:  
FLSH_ERASE[7:0]  
ERASE  
FLSHCTL  
PGADR  
94  
B2  
B7  
PREBOOT  
SECURE  
FLSH_MEEN FLSH_PWE  
FLSH_PGADR[6:0]  
Serial EEPROM:  
EEDATA[7:0]  
EEDATA  
EECTRL  
9E  
9F  
EECTRL[7:0]  
Page: 60 of 104  
© 2005-2011 Teridian Semiconductor Corporation