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71M6511H-IGTR 参数 Datasheet PDF下载

71M6511H-IGTR图片预览
型号: 71M6511H-IGTR
PDF下载: 下载PDF文件 查看货源
内容描述: 单相电能计量芯片 [Single-Phase Energy Meter IC]
分类和应用:
文件页数/大小: 95 页 / 860 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6511/71M6511H  
Single-Phase Energy Meter IC  
DATA SHEET  
AUGUST 2007  
CE RAM Locations  
CE Front End Data (Raw Data)  
Access to the raw data provided by the AFE is possible by reading addresses 0 through 7, as listed below.  
Address (HEX)  
Name  
Description  
00  
01  
02  
03  
04  
05  
06  
07  
IA  
Phase A current  
Phase A voltage  
Phase B current  
Reserved  
VA  
IB  
-
-
Reserved  
-
TEMP  
--  
Reserved  
Temperature  
Reserved  
CE Status Word  
Since the CE_BUSY interrupt occurs at 2520.6Hz (or at 3276.8Hz when MUX_DIV = 2), it is desirable to minimize the  
computation required in the interrupt handler of the MPU. The MPU can read CESTATUS at every CE_BUSY interrupt.  
CE  
Name  
Description  
Address  
0x51  
CESTATUS  
See description of CE status word below  
The CE Status Word is useful for generating early warnings to the MPU. It contains sag warnings for phase A, as well as F0,  
the derived clock operating at the fundamental input frequency. CESTATUS provides information about the status of voltage  
and input AC signal frequency, which are useful for generating an early power fail warning to initiate necessary data storage.  
CESTATUS represents the status flags for the preceding CE code pass (CE_BUSY interrupt).  
Note: The CE does not store sag alarms from one code pass to the next. CESTATUS is refreshed at every CE_BUSY  
interrupt and remains valid for up to 100µs after the CE_BUSY interrupt occurs. Unsynchronized read operations of  
CESTATUS will yield unreliable results.  
The significance of the bits in CESTATUS is shown in the table below:  
CESTATUS  
Name  
Description  
[bit]  
31-29  
28  
Not Used  
These unused bits will always be zero.  
F0  
F0 is a square wave at the exact fundamental input frequency.  
27  
RESERVED  
RESERVED  
26  
Normally zero. Becomes one when VA remains below SAG_THR for SAG_CNT  
samples. Will not return to zero until VA rises above SAG_THR.  
25  
SAG_A  
24-0  
Not Used  
These unused bits will always be zero.  
Page: 66 of 95  
© 2005-2007 TERIDIAN Semiconductor Corporation  
V2.6  
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