71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
AUGUST 2007
V1
V3P3
WDT dis-
abled
V3P3-10mV
V3P3 -
400mV
Normal
operation,
WDT
enabled
when
(V1 < VBIAS)
the battery is
enabled
VBIAS
Battery or
reset
mode
0V
Figure 11: Voltage Range for V1
I2C Interface (EEPROM)
A dedicated 2-pin serial interface implements an I2C driver that can be used to communicate with external EEPROM devices.
The interface can be multiplexed onto the DIO pins DIO4 (SCK) and DIO5 (SDA) by setting the I/O RAM register DIO_EEX
(0x2008[4]). The MPU communicates with the interface through two SFR registers: EEDATA (0x9E) and EECTRL (0x9F). If
the MPU wishes to write a byte of data to EEPROM, it places the data in EEDATA and then writes the ‘Transmit’ code to
EECTRL. The write to EECTRL initiates the transmit sequence. By observing the BUSY bit in EECTRL the MPU can
determine when the transmit operation is finished (i.e. when the BUSY bit transitions from 1 to 0). INT5 is also asserted when
BUSY falls. The MPU can then check the RX_ACK bit to see if the EEPROM acknowledged the transmission.
A byte is read by writing the ‘Receive’ command to EECTRL and waiting for BUSY to fall. Upon completion, the received data
will appear in EEDATA.
The serial transmit and receive clock is 78kHz during each transmission, and SCL is held in a high state until the next
transmission. The bits in EECTRL are shown in Table 57.
The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly. However, controlling DIO4 and
DIO5 directly is discouraged, because it may tie up the MPU to the point where it may become too busy to process
interrupts.
Note: Clock stretching and multi-master operation is not supported for the I2C interface.
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