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71M6511H-IGTR 参数 Datasheet PDF下载

71M6511H-IGTR图片预览
型号: 71M6511H-IGTR
PDF下载: 下载PDF文件 查看货源
内容描述: 单相电能计量芯片 [Single-Phase Energy Meter IC]
分类和应用:
文件页数/大小: 95 页 / 860 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6511/71M6511H  
Single-Phase Energy Meter IC  
DATA SHEET  
AUGUST 2007  
DIO_DIR bit  
0
1
DIO Pin Function  
input  
output  
Table 53: DIO_DIR Control Bit  
Values read from and written into the DIO ports use the data registers P0, P1 and P2.  
A 3-bit configuration word, I/O RAM register, DIO_Rx (0x2009[2:0] through 0x200E[6:4]) can be used for certain pins, when  
configured as DIO, to individually assign an internal resource such as an interrupt or a timer control (see Table 52 for DIO pins  
available for this option). This way, DIO pins can be tracked even if they are configured as outputs. This feature is useful for  
pulse counting. The control resources selectable for the DIO pins are listed in Table 54. If more than one input is connected to  
the same resource, the resources are combined using a logical OR.  
DIO_R  
Resource Selected for DIO Pin  
Value  
0
1
2
3
4
5
6
7
NONE  
Reserved  
T0 (counter0 clock)  
T1 (counter1 clock)  
High priority I/O interrupt (INT0 rising)  
Low priority I/O interrupt (INT1 rising)  
High priority I/O interrupt (INT0 falling)  
Low priority I/O interrupt (INT1 falling)  
Table 54: Selectable Controls using the DIO_DIR Bits  
Additionally, if DIO6 and DIO7 are declared outputs, they can be configured as dedicated pulse outputs (WPULSE = DIO6,  
VARPULSE = DIO7) using the I/O RAM registers DIO_PW (0x2008[2]) and DIO_PV (0x2008[3]). In this case, DIO6 and DIO7  
are under CE control. DIO4 and DIO5 can be configured to implement the EEPROM Interface by setting the I/O RAM register  
DIO_EEX (0x2008[4]).  
Physical Memory  
Data bus address space is allocated to on-chip memory as shown in Table 55.  
Address  
(hex)  
Memory  
Wait States  
(at 5MHz)  
Memory Size  
(bytes)  
Memory Type  
Typical Usage  
Technology  
Program and non-volatile  
data  
0000-FFFF  
Flash Memory  
Non-volatile  
0
64KB  
0000-07FF  
1000-13FF  
Static RAM  
Static RAM  
Battery-buffered  
Volatile  
MPU data  
CE data  
0
5
2KB  
1KB  
Configuration RAM  
(I/O RAM)  
2000-20FF  
3000-3FFF  
Static RAM  
Static RAM  
Volatile  
Volatile  
0
5
256  
CE Program code  
4KB  
Table 55: MPU Data Memory Map  
Page: 37 of 95  
© 2005-2007 TERIDIAN Semiconductor Corporation  
V2.6  
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