TSC80251G2D
(1)
SS#
(output)
T
CHCH
T
T
CLCH
CHCL
SCK
(SSCPOL= 0)
(output)
T
T
CLCX
CHCX
SCK
(SSCPOL= 1)
(output)
T
T
T
T
IVCH
IVCL
CHIX
CLIX
MISO
(input)
MSB IN
BIT 6
LSB IN
T
T
T
T
CLOV
CHOV
CLOX
CHOX
MOSI
(output)
Port Data
MSB OUT
BIT 6
LSB OUT
Port Data
Note:
1. SS# handled by software.
Figure 28. SPI Master Waveforms (SSCPHA= 1)
SS#
(input)
T
T
T
T
SLCH
SLCL
CLSH
CHSH
T
T
SHSL
CHCH
T
T
CLCH
SCK
(SSCPOL= 0)
(input)
T
T
CLCX
CHCX
CHCL
SCK
(SSCPOL= 1)
(input)
T
T
T
T
CLOV
CHOV
CLOX
CHOX
T
T
SHOX
SLOV
MISO
(output)
(1)
SLAVE MSB OUT
BIT 6
SLAVE LSB OUT
T
T
T
T
IVCH
IVCL
CHIX
CLIX
MOSI
(input)
MSB IN
BIT 6
LSB IN
Note:
1. Not Defined but normally MSB of character just received.
Figure 29. SPI Slave Waveforms (SSCPHA= 0)
Rev. A - May 7, 1999
51
TEMIC [ TEMIC SEMICONDUCTORS ]
