TSC87251G1A
Signal
Name
Alternate
Function
Type
Description
T2
I/O
Timer 2 Clock Input/Output
P1.0
For the timer 2 capture mode, T2 is the external clock input. For the Timer 2 clock–out mode,
T2 is the clock output.
T2EX
I
Timer 2 External Input
P1.1
P3.1
In timer 2 capture mode, a falling edge initiates a capture of the timer 2 registers. In auto–reload
mode, a falling edge causes the timer 2 register to be reloaded. In the up–down counter mode,
this signal determines the count direction: 1= up, 0= down.
TXD
VDD
VSS
I/O
Transmit Serial Data
TXD outputs the shift clock in serial I/O mode 0 and transmits data in serial I/O modes 1, 2 and 3.
PWR
GND
GND
Digital Supply Voltage
Connect this pin to +5V or +3V supply voltage.
Circuit Ground
Connect this pin to ground.
VSS1
Secondary Ground 1
This ground is provided to reduce ground bounce and improve power supply bypassing. Con-
nection of this pin to ground is recommended. However, when using the TSC87251G1A as a
pin–for–pin replacement for a 8xC51 product, VSS1 can be unconnected without loss of com-
patibility.
Not available on DIP package.
VSS2
VPP
GND
Secondary Ground 2
This ground is provided to reduce ground bounce and improve power supply bypassing. Con-
nection of this pin to ground is recommended. However, when using the TSC87251G1A as a
pin–for–pin replacement for a 8xC51 product, VSS2 can be unconnected without loss of com-
patibility.
Not available on DIP package.
I
Programming Supply Voltage
The programming supply voltage is applied to this input for programming the on–chipEPROM/
OTPROM
WR#
O
I
Write
P3.6
Write signal output to external memory.
XTAL1
Input to the on–chip inverting oscillator amplifier
To use the internal oscillator, a crystal/resonator circuit is connected to this pin. If an external
oscillator is used, its output is connected to this pin. XTAL1 is the clock source for internal tim-
ing.
XTAL2
O
Output of the on–chip inverting oscillator amplifier
To use the internal oscillator, a crystal/resonator circuit is connected to this pin. If an external
oscillator is used, leave XTAL2 unconnected.
Note:
1. The description of A15:8/P2.7:0 and AD7:0/P0.7:0 are for the non–page mode chip configuration. If the chip is configured in page mode
operation, port 0 carries the lower address bits (A7:0) while port 2 carries the upper address bits (A15:8) and the data (D7:0).
7
Rev. A – September 21, 1998