TS80C52X2
6.9 Power-Off Flag
The power-off flag allows the user to distinguish between a “cold start” reset and a “warm start” reset.
A cold start reset is the one induced by V switch-on. A warm start reset occurs while V is still applied to
CC
CC
the device and could be generated for example by an exit from power-down.
The power-off flag (POF) is located in PCON register (See Table 16.). POF is set by hardware when V rises
CC
from 0 to its nominal voltage. The POF can be set or cleared by software allowing the user to determine the type
of reset.
Table 16. PCON Register
PCON - Power Control Register (87h)
7
6
5
-
4
3
2
1
0
SMOD1
SMOD0
POF
GF1
GF0
PD
IDL
Bit
Number
Bit
Mnemonic
Description
Serial port Mode bit 1
7
6
5
4
SMOD1
SMOD0
-
Set to select double baud rate in mode 1, 2 or 3.
Serial port Mode bit 0
Clear to select SM0 bit in SCON register.
Set to to select FE bit in SCON register.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Power-Off Flag
Clear to recognize next reset type.
POF
Set by hardware when V rises from 0 to its nominal voltage. Can also be set by software.
CC
General purpose Flag
3
2
1
0
GF1
GF0
PD
Cleared by user for general purpose usage.
Set by user for general purpose usage.
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
Power-Down mode bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
Idle mode bit
IDL
Clear by hardware when interrupt or reset occurs.
Set to enter idle mode.
Reset Value = 00X1 0000b
Not bit addressable
Rev. B - Jan. 25, 1999
31
Preliminary
TEMIC [ TEMIC SEMICONDUCTORS ]
