80C154/83C154
Serial Port Timing – Shift Register Mode
16 MHz
20 MHz
25 MHz
30 MHz
36 MHz
SYMBOL
TXLXL
PARAMETER
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
Serial Port Clock Cycle Time
750
563
600
480
480
380
400
300
330
220
TQVXH
Output Data Setup to Clock Rising
Edge
TXHQX
TXHDX
TXHDV
Output Data Hold after Clock Rising
Edge
63
0
90
0
65
0
50
0
45
0
Input Data Hold after Clock Rising
Edge
Clock Rising Edge to Input Data Valid
563
450
350
300
250
Shift Register Timing Waveforms
MATRA MHS
21
Rev.F (14 Jan. 97)