12-BIT µP-COMPATIBLE
ANALOG-TO-DIGITAL CONVERTERS
TC7109
TC7109A
roll-over errors will be slightly worse than in the ±4V case.
For large common-mode voltage ranges, the integrator
outputswingmustbereducedfurther.Thiswillincreaseboth
noise and roll-over errors. To improve performance, ±6V
supplies may be used.
24
22
23
25
OSC OSC
OSC
OUT
BUFFERED
OSC OUT
Integrating Capacitor
SEL
IN
The integrating capacitor, CINT, should be selected to
give the maximum integrator output voltage swing that will
not saturate the integrator to within 0.3V from either supply.
A ±3.5V to ±4V integrator output swing is nominal for the
TC7109A, with ±5V supplies and analog common con-
nected to GND. For 7-1/2 conversions per second (61.72
kHz internal clock frequency), nominal values CINT and CAZ
are 0.15 µF and 0.33 µF, respectively. These values should
be changed if different clock frequencies are used to main-
tain the integrator output voltage swing. The value of CINT is
given by:
R
C
+
V
OR OPEN
f
= 0.45/RC
OSC
Figure 10. TC7109A RC Oscillator
+
CLOCK
V
(2048 ϫ Clock Period) (20 µA)
Integrator Output Voltage Swing
÷
58
CINT
=
24
22
23
25
The integrating capacitor must have low dielectric ab-
sorption to prevent roll-over errors. Polypropylene capaci-
tors give undetectable errors, at reasonable cost, up to
+85°C. Teflon® capacitorsarerecommendedforthemilitary
temperature range. While their dielectric absorption charac-
teristics vary somewhat between units, devices may be
selected to less than 0.5 count of error due to dielectric
absorption.
OSC OSC
SEL IN
OSC
OUT
BUFFERED
OSC OUT
GND
CRYSTAL
Figure 11. TC7109A Crystal Oscillator
Test Input
Integrating Resistor
The counter and its outputs may be tested easily. When
the TEST input is connected to GND, the internal clock is
disabledandthecounteroutputsareallforcedintotheHIGH
state. Whentheinputreturnstothe1/2(V+–GND)voltageor
to V+ and one clock is input, the counter outputs will all be
clocked to the LOW state.
The counter output latches are enabled when the TEST
input is taken to a level halfway between V+ and GND,
allowing the counter contents to be examined anytime.
The integrator and buffer amplifiers have a class A
output stage with 100 µA of quiescent current. They supply
20 µA of drive current with negligible nonlinearity. The
integrating resistor should be large enough to remain in this
very linear region over the input voltage range, but small
enough that undue leakage requirements are not placed on
the PC board. For 2.048V full-scale a 100 kΩ resistor is
recommended and for 409.6 mV full-scale a 20 kΩ resistor
is recommended. RINT may be selected for other values of
full scale by:
Component Value Selection
Full-Scale Voltage
RINT
=
The integrator output swing for full-scale should be as
large as possible. For example, with ±5V supplies and
COMMONconnectedtoGND, thenominalintegratoroutput
swing at full-scale is ±4V. Since the integrator output can go
to 0.3V from either supply without significantly effecting
linearity, a 4V integrator output swing allows 0.7V for varia-
tions in output swing due to component value and oscillator
tolerances. With ±5V supplies and a common-mode voltage
range of ±1V required, the component values should be
selected to provide ±3V integrator output swing. Noise and
20 µA
Auto-Zero Capacitor
As the auto-zero capacitor is made large, the system
noise is reduced. Since the TC7109A incorporates a zero
integrator cycle, the size of the auto-zero capacitor does not
affect overload recovery. The optimal value of the auto-zero
capacitor is between 2 and 4 times CINT. A typical value for
CAZ is 0.33 µF.
3-104
TELCOM SEMICONDUCTOR, INC.
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
