TSL2562, TSL2563
LOW-VOLTAGE
LIGHT-TO-DIGITAL CONVERTER
TAOS066J − MAY 2007
MECHANICAL DATA
PACKAGE CS
TOP VIEW
Six-Lead Chipscale Device
PIN OUT
BOTTOM VIEW
1398
171
6
5
4
1
2
3
203
465
1250
END VIEW
400 ꢃ 50
700 ꢃ 55
6 ꢀ 100
TYP 30ꢁ
BOTTOM VIEW
SIDE VIEW
375 ꢃ 30
6 ꢀ ꢂ 250 ꢃ 30
500
1750
500
Pb
Lead Free
500
375 ꢃ 30
NOTES: A. All linear dimensions are in micrometers. Dimension tolerance is ± 25 μm unless otherwise noted.
B. Solder bumps are formed of Sn (96.5%), Ag (3%), and Cu (0.5%).
C. The top of the photodiode active area is 410 μm below the top surface of the package.
D. The layer above the photodiode is glass and epoxy with an index of refraction of 1.53.
E. This drawing is subject to change without notice.
Figure 19. Package CS — Six-Lead Chipscale Packaging Configuration
Copyright E 2007, TAOS Inc.
The LUMENOLOGY r Company
r
r
30
www.taosinc.com
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
