TAS2521
www.ti.com
SLAS687A –FEBRUARY 2013–REVISED FEBRUARY 2013
2 PACKAGE AND SIGNAL DESCRIPTIONS
2.1 Package/Ordering Information
OPERATING
TEMPERATURE
RANGE
PACKAGE
DESIGNATOR
TRANSPORT MEDIA,
ORDERING NUMBER
PRODUCT
PACKAGE
QUANTITY
TAS2521IRGET
TAS2521IRGER
Tape and reel, 250
Tape and reel, 3000
TAS2521
QFN-24
RGE
–40°C to 85°C
2.2 Device Information
RGE PACKAGE
(TOP VIEW)
24 23 22 21 20 19
GPIO/DOUT
MISO
SPI_SEL
1
2
3
4
5
6
18
RST
17
16
15
14
13
MCLK
BCLK
AINL
AINR
HPOUT
AVSS
WCLK
DIN
7
8
9
10 11 12
Table 2-1. RGE PIN FUNCTIONS
PIN
I/O(1)
DESCRIPTION
NAME
SPI_SEL
RST
NO.
1
I
I
Selects between SPI and I2C digital interface modes; (1 = SPI mode) (0 = I2C mode)
Reset for logic, state machines, and digital filters; asserted LOW.
Analog single-ended line left input
2
AINL
3
I
AINR
4
I
Analog single-ended line right input
HPOUT
AVSS
5
O
Headphone and Lineout Driver Output
6
GND Analog Ground, 0V
AVDD
LDO_SEL
SPKM
SPKVDD
SPKVSS
SPKP
7
PWR Analog Core Supply Voltage, 1.5V - 1.95V, tied internally to the LDO output
8
I
Select Pin for LDO; ties to either SPKVDD or SPKVSS
Class-D speaker driver inverting output
9
O
10
11
12
13
14
15
16
PWR Class-D speaker driver power supply
PWR Class-D speaker driver power supply ground supply
O
I
Class-D speaker driver non-inverting output
Audio Serial Data Bus Input Data
DIN
WCLK
BCLK
I/O
I/O
I
Audio Serial Data Bus Word Clock
Audio Serial Data Bus Bit Clock
MCLK
Master CLK Input / Reference CLK for CLK Multiplier - PLL (On startup PLLCLK = CLKIN)
(1) I = Input, O = Output, GND = Ground, PWR = Power, Z = High Impedance
Copyright © 2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TAS2521
PACKAGE AND SIGNAL DESCRIPTIONS
3