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DS90UB913QSQ/NOPB 参数 Datasheet PDF下载

DS90UB913QSQ/NOPB图片预览
型号: DS90UB913QSQ/NOPB
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内容描述: DS90UB913Q / DS90UB914Q 10-100MHz 10 / 12位DC平衡的FPD -Link的III串行器和解串与双向控制通道 [DS90UB913Q/DS90UB914Q 10-100MHz 10/12- Bit DC-Balanced FPD-Link III Serializer and Deserializer with Bidirectional Control Channel]
分类和应用: 光电二极管
文件页数/大小: 63 页 / 1331 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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DS90UB913Q, DS90UB914Q  
www.ti.com  
SNLS420B JULY 2012REVISED APRIL 2013  
Table 2. DS90UB914Q Control Registers (continued)  
Addr  
(Hex)  
Name  
Bits  
Field  
R/W  
Default  
Description  
0x03  
Forward Channel Parity Checker Enable  
1: Enable  
0: Disable  
RX Parity Checker  
Enable  
7
RW  
1
Back Channel CRC Generator Enable  
1: Enable  
0: Disable  
TX CRC Checker  
Enable  
6
5
4
3
RW  
RW  
RW  
RW  
1
1
0
1
Auto voltage control  
1: Enable (auto detect mode)  
0: Disable  
VDDIO Control  
VDDIO voltage set  
1: 3.3V  
0: 1.8V  
I2C Pass-Through Mode  
1: Pass-Through Enabled  
0: Pass-Through Disabled  
VDDIO Mode  
I2C Passthrough  
Automatically Acknowledge I2C Remote Write  
When enabled, I2C writes to the Deserializer (or  
any remote I2C Slave, if I2C PASS ALL is  
enabled) are immediately acknowledged  
without waiting for the Deserializer to  
acknowledge the write. The accesses are then  
remapped to address specified in 0x06. This  
allows I2C bus without LOCK.  
General  
Configuration 1  
2
AUTO ACK  
RW  
0
1: Enable  
0: Disable  
Parity Error Reset, This bit is self-clearing.  
1: Parity Error Reset  
0: No effect  
1
0
Parity Error Reset  
RRFB  
RW  
RW  
0
1
Pixel Clock Edge Select  
1: Parallel Interface Data is strobed on the  
Falling Clock Edge.  
0: Parallel Interface Data is strobed on the  
Rising Clock Edge.  
Equalization gain  
0x00 = ~0.0 dB  
0x01 = ~4.5 dB  
0x03 = ~6.5 dB  
0x07 = ~7.5 dB  
0x0F = ~8.0 dB  
0x1F = ~11.0 dB  
0x3F = ~12.5 dB  
EQ level - when  
AEQ bypass is  
enabled EQ setting  
is provided by this  
register  
EQ Feature  
Control 1  
0x04  
7:0  
RW  
RW  
0x00  
0x05  
0x06  
RESERVED  
7:1  
0
Remote ID  
0x0C  
0
Remote Serializer ID  
RW  
Freeze Serializer Device ID Prevent auto-  
loading of the Serializer Device ID from the  
Forward Channel. The ID will be frozen at the  
value written.  
SER ID  
Freeze Device ID  
Serializer Alias ID  
7:1  
RW  
0x00  
7-bit Remote Serializer Device Alias ID  
Configures the decoder for detecting  
transactions designated for an I2C Deserializer  
device. The transaction will be remapped to the  
address specified in the SER ID register. A  
value of 0 in this field disables access to the  
remote I2C Slave.  
0x07  
SER Alias  
0
RSVD  
Reserved  
Copyright © 2012–2013, Texas Instruments Incorporated  
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