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DS90UB913QSQ/NOPB 参数 Datasheet PDF下载

DS90UB913QSQ/NOPB图片预览
型号: DS90UB913QSQ/NOPB
PDF下载: 下载PDF文件 查看货源
内容描述: DS90UB913Q / DS90UB914Q 10-100MHz 10 / 12位DC平衡的FPD -Link的III串行器和解串与双向控制通道 [DS90UB913Q/DS90UB914Q 10-100MHz 10/12- Bit DC-Balanced FPD-Link III Serializer and Deserializer with Bidirectional Control Channel]
分类和应用: 光电二极管
文件页数/大小: 63 页 / 1331 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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DS90UB913Q, DS90UB914Q  
www.ti.com  
SNLS420B JULY 2012REVISED APRIL 2013  
Table 1. DS90UB913Q Control Registers (continued)  
Addr  
(Hex)  
Name  
Bits Field  
R/W  
Default  
Description  
7:3  
2:1  
RSVD  
Reserved  
Allows choosing different OSC clock frequencies for  
forward channel frame.  
OSC Clock Frequency in Functional Mode when OSC  
mode is selected or when the selected clock source is  
not present e.g. missing PCLK/ External Oscillator. See  
Table 3 for oscillator clock frequencies when PCLK/  
External Clock is missing.  
Clock Source  
RW  
RW  
0x0  
0x14  
BIST Control  
BIST Control:  
1: Enable BIST mode  
0: Disable BIST mode  
0
BIST Enable  
0
0x15–0  
x1D  
RESERVED  
The watchdog timer allows termination of a control  
channel transaction if it fails to complete within a  
programmed amount of time. This field sets the  
Bidirectional Control Channel Watchdog Timeout value in  
units of 2ms. This field should not be set to 0.  
BCC Watchdog  
Timer  
7:1  
0
RW  
RW  
0x7F  
0
BCC Watchdog  
Control  
0x1E  
Disable Bidirectional Control Channel Watchdog Timer  
1: Disables BCC Watchdog Timer operation  
0: Enables BCC Watchdog Timer operation  
BCC Watchdog  
Timer Disable  
0x1F-  
0x29  
RESERVED  
0
BIST Mode CRC  
Errors Count  
Number of CRC Errors in the back channel when in BIST  
mode  
0x2A  
CRC Errors  
7:0  
R
0x2B-  
0x34  
RESERVED  
7:4  
3
RSVD  
Reserved  
Status of mode select pin  
1: Indicates External Oscillator mode is selected by  
mode-resistor  
0: External Oscillator mode is not selected by mode-  
resistor  
PIN_LOCK to  
External Oscillator  
RW  
0
PLL Clock  
Overwrite  
Status of mode select pin  
1: Indicates PCLK mode is selected by mode-resistor  
0: PCLK mode not selected by mode-resistor  
0x35  
PIN_LOCK2Oscilla  
tor  
2
RW  
RW  
0
0
Affects only when 0x03[1]=1 (OV_CLK2PLL) and  
0x35[0]=0.  
1: Routes GPO3 directly to PLL  
0: Allows PLL to lock to PCLK"  
LOCK to External  
Oscillator  
1
0
RSVD  
Reserved  
Table 2. DS90UB914Q Control Registers  
Addr  
(Hex)  
Name  
Bits  
Field  
R/W  
Default  
Description  
7-bit address of Deserializer;  
0x60h  
7:1  
0
DEVICE ID  
RW  
0x60'h  
0x00  
I2C Device ID  
0: De-Serializer Device ID is set using address  
coming from CAD  
Deserializer ID  
Select  
RW  
0
1: Register I2C Device ID overrides ID[x]  
Copyright © 2012–2013, Texas Instruments Incorporated  
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