C2510Fx / CC2511Fx
the whole write operation over again and not
just start from where it failed, one has to erase
the page, writing the start address to
FADDRH:FADDRL, and setting FCTL.WRITE
to 1 (see Section 13.3.3).
The steps required to start a CPU flash write
operation are shown in Figure 22. Note that
code must be run from RAM in unified memory
space.
Disable interrupts
YES
FCTL.BUSY=1?
NO
Setup FCTL, FWT,
FADDRH, FADDRL
Write two bytes to
FWDATA
NO
YES
Transfer
Completed?
NO
FCTL.SWBSY=1?
YES
Figure 22: CPU Flash Write Executed from RAM
FCTL.SWBSY
FCTL.BUSY
Write two bytes
Write two bytes
to FWDATA
(D0 and D1)
Write two bytes
to FWDATA
to FWDATA
40 µs
40 µs
40 µs
Set FCTL.WRITE= 1
FADDRH:FADDRL= n
FADDRH:FADDRL= n + 1
Write D2 and D3 to
flash address n + 1
FADDRH:FADDRL= n + 2
Write D4 and D5 to
flash address n + 2
Write operation failed due
to a timeout.
Write D0 and D1 to
flash addres n
Figure 23. Flash Write Timeout
13.3.3 Flash Page Erase
simultaneously with
a
page write, i.e.
FCTL.WRITEis set to 1, the page erase will be
performed before the page write operation.
The FCTL.BUSYbit can be polled to see when
the page erase has completed.
After a flash page erase, all bytes in the
erased page are set to 1.
A
page erase is initiated by setting
FCTL.ERASE to 1. The page addressed by
FADDRH[5:1]is erased when a page erase is
initiated. Note that if a page erase is initiated
SWRS055D
Page 85 of 243
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