C2510Fx / CC2511Fx
S0CON (0x98) – CPU Interrupt Flag 2
Bit
Name
Reset
R/W
Description
7:2
0
R/W
Not used
1
0
R/W
AES interrupt. ENCIF has two interrupt flags, ENCIF_1 and ENCIF_0.
Interrupt source sets both ENCIF_1and ENCIF_0, but setting one of these
flags in SW will generate an interrupt request. Both flags are set when the
AES co-processor requests the interrupt.
ENCIF_1
0
1
Interrupt not pending
Interrupt pending
0
0
R/W
AES interrupt. ENCIF has two interrupt flags, ENCIF_1 and ENCIF_0.
Interrupt source sets both ENCIF_1and ENCIF_0, but setting one of these
flags in SW will generate an interrupt request. Both flags are set when the
AES co-processor requests the interrupt.
ENCIF_0
0
1
Interrupt not pending
Interrupt pending
S1CON (0x9B) – CPU Interrupt Flag 3
Bit
Name
Reset
R/W
Description
7:6
0
R/W
Not used
1
0
R/W
RF general interrupt. RFIF has two interrupt flags, RFIF_1 and RFIF_0.
Interrupt source sets both RFIF_1and RFIF_0, but setting one of these
flags in SW will generate an interrupt request. Both flags are set when the
radio requests the interrupt.
RFIF_1
0
1
Interrupt not pending
Interrupt pending
0
0
R/W
RF general interrupt. RFIF has two interrupt flags, RFIF_1 and RFIF_0.
Interrupt source sets both RFIF_1and RFIF_0, but setting one of these
flags in SW will generate an interrupt request. Both flags are set when the
radio requests the interrupt.
RFIF_0
0
1
Interrupt not pending
Interrupt pending
SWRS055D
Page 64 of 243
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