C2510Fx / CC2511Fx
Figure 44: Writing Big/Little Endian
Figure 45: Reading Big/Little Endian
13.16.8
USB Reset
• All endpoint FIFOs are flushed
USBCS0, USBCSIL,
USBCSOL, USBCSOHare cleared.
When reset signaling is detected on the bus,
the USBCIF.RSTIF flag will be asserted. If
USBCIE.RSTIE is enabled, IRCON2.USBIF
will also be asserted and an interrupt request
is generated if IEN2.USBIE=1. The firmware
should take appropriate action when a USB
reset occurs. A USB reset should place the
device in the Default state where it will only
respond to address 0 (the default address).
One or more resets will normally take place
during the enumeration phase right after the
USB cable is connected.
•
USBCSIH,
• All interrupts, except SOF and suspend,
are enabled
• An interrupt request is generated (if
IEN2.USBIE=1
USBCIE.RSTIE=1)
and
Firmware should close all pipes and wait for a
new enumeration phase when USB reset is
detected.
The following actions are performed by the
USB controller when a USB reset occurs:
13.16.9
Suspend and Resume
USB controller will
The
assert
•
•
USBADDRis set to 0
USBINDEXis set to 0
USBCIF.SUSPENDIF and enter suspend
mode when the USB bus has been
SWRS055D
Page 178 of 243
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