CC2430
Peripherals
0xFEFF (426 bytes) will lose all data when
PM2 or PM3 is entered. These locations will
contain undefined data when PM0 is re-
entered.
: Reset
transparent to software with the following
exceptions:
•
•
The RF TXFIFO/RXFIFO contents are not
retained when entering PM2 or PM3.
Watchdog timer 15-bit counter is reset to
0x0000 when entering PM2 or PM3.
The registers which retain their contents are
the CPU registers, peripheral registers and RF
registers, unless otherwise specified for a
given register bit field. Switching to the low-
power modes PM2 or PM3 appears
13.2 Reset
The CC2430 has four reset sources. The
•
•
I/O pins are configured as inputs with pull-
up
CPU program counter is loaded with
0x0000 and program execution starts at
this address
All peripheral registers are initialized to
their reset values (refer to register
descriptions)
following events generate a reset:
•
•
•
•
Forcing RESET_N input pin low
A power-on reset condition
A brown-out reset condition
Watchdog timer reset condition
•
•
The initial conditions after a reset are as
follows:
Watchdog timer is disabled
13.2.1
Power On Reset and Brown Out Detector
state until the supply voltage reaches above
the Power On Reset and Brown Out voltages.
The CC2430 includes a Power On Reset (POR)
providing correct initialization during device
power-on. Also includes is a Brown Out
Detector (BOD) operating on the regulated
1.8V digital power supply only, The BOD will
protect the memory contents during supply
voltage variations which cause the regulated
1.8V power to drop below the minimum level
required by flash memory and SRAM.
Figure 13 shows the POR/BOD operation with
the 1.8V (typical) regulated supply voltage
together with the active low reset signals
BOD_RESET and POR_RESET shown in the
bottom of the figure (note that signals are not
available, just for ilustaration of events).
The cause of the last reset can read from the
register bits SLEEP.RST. It should be noted
that a BOD reset will be read as a POR reset.
When power is initially applied to the CC2430
the Power On Reset (POR) and Brown Out
Detector (BOD) will hold the device in reset
1.8V REGULATED
UNREGULATED
VOLT
BOD RESET ASSERT
POR RESET DEASSERT RISING VDD
POR RESET ASSERT FALLING VDD
0
POR OUTPUT
X
X
X
BOD RESET
POR RESET
X
X
X
Figure 13 : Power On Reset and Brown Out Detector Operation
13.3 Flash Controller
software and through the debug interface. See
Table 22 on page 26 for flash memory size
options.
The CC2430 contains 32, 64 or 128 KB flash
memory for storage of program code. The
flash memory is programmable from the user
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 71 of 211
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