欢迎访问ic37.com |
会员登录 免费注册
发布采购

CC2430F32RTC 参数 Datasheet PDF下载

CC2430F32RTC图片预览
型号: CC2430F32RTC
PDF下载: 下载PDF文件 查看货源
内容描述: 真正的系统级芯片解决方案的2.4 GHz IEEE 802.15.4 / ZigBee的 [A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee]
分类和应用: 电信集成电路
文件页数/大小: 212 页 / 1862 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
 浏览型号CC2430F32RTC的Datasheet PDF文件第57页浏览型号CC2430F32RTC的Datasheet PDF文件第58页浏览型号CC2430F32RTC的Datasheet PDF文件第59页浏览型号CC2430F32RTC的Datasheet PDF文件第60页浏览型号CC2430F32RTC的Datasheet PDF文件第62页浏览型号CC2430F32RTC的Datasheet PDF文件第63页浏览型号CC2430F32RTC的Datasheet PDF文件第64页浏览型号CC2430F32RTC的Datasheet PDF文件第65页  
CC2430  
Debug Interface : Debug Lock Bit  
Note that after the Debug Lock bit has  
changed due to a flash information page write  
or a flash mass erase, a HALT, RESUME,  
DEBUG_INSTR or STEP command must be  
executed so that the Debug Lock value  
returned by READ_STATUS shows the  
updated Debug Lock value. For example a  
dummy NOP DEBUG_INSTR command could  
be executed. After a device reset, the Debug  
Lock bit will be updated. Alternatively the chip  
must be reset and debug mode reentered.  
the Debug Interface needs to select the Flash  
Information Page first instead of the Flash  
Main Pages which is the default setting. The  
Information Page is selected through the  
Debug Configuration which is written through  
the Debug Interface only. Refer to section  
12.4.1 and Table 36 for details on how the  
Flash Information Page is selected using the  
Debug Interface.  
Table 34 defines the byte containing the flash  
lock protection bits. Note that this is not an  
SFR register, but instead the byte stored at  
location 0x000 in Flash Information Page.  
The CHIP_ERASE command is used to clear  
the Debug Lock bit.  
The lock protect bits are written as a normal  
flash write to FWDATA(see section 13.3.2), but  
Table 34: Flash Lock Protection Bits Definition  
Bit  
7:5  
4
Name  
Description  
-
Reserved, write as 0  
Boot Block Lock  
BBLOCK  
0
1
Page 0 is write protected  
Page 0 is writeable, unless LSIZE is 000  
3:1  
Lock Size. Sets the size of the upper Flash area which is write-  
protected. Byte sizes and page number are listed below  
LSIZE[2:0]  
000  
001  
010  
011  
100  
101  
110  
111  
128k bytes (All pages) CC2430-F128 only  
64k bytes (page 32 - 63) CC2430-F64/128 only  
32k bytes (page 48 - 63)  
16k bytes (page 56 - 63)  
8k bytes (page 60 - 63)  
4k bytes (page 62 - 63)  
2k bytes (page 63)  
0k bytes (no pages)  
0
Debug lock bit  
DBGLOCK  
0
1
Disable debug commands  
Enable debug commands  
12.4.1  
Debug Configuration  
The  
commands  
WR_CONFIG  
and  
description of this configuration data is shown  
RD_CONFIG are used to access the debug  
configuration data byte. The format and  
in Table 36.  
12.4.2  
Debug Status  
A Debug status byte is read using the  
READ_STATUS command. The format and  
description of this debug status is shown in  
Table 37.  
CHIP_ERASE command or oscillator stable  
status required for debug commands HALT,  
RESUME, DEBUG_INSTR, STEP_REPLACE  
and STEP_INSTR.  
The READ_STATUS command is used e.g. for  
polling the status of flash chip erase after a  
CC2430 Data Sheet (rev. 2.1) SWRS036F  
Page 61 of 211  
 
 
 复制成功!