CC2430
Radio : Length field
used for byte synchronization, and is not part
of the data stored in the receive buffer
(RXFIFO).
In receive mode CC2430 uses the preamble
sequence for symbol synchronization and
frequency offset adjustments. The SFD is
Synchronisation Header
Preamble
SFD
IEEE 802.15.4
0
0
0
0
0
0
0
0
7
A
2·(PREAMBLE_LENGTH+ 1) zero symbols
SW0 SW1 SW2 SW3
SW0 = SYNCWORD[3:0] if different from 'F', else '0'
SW1 = SYNCWORD[7:4] if different from 'F', else '0'
SW2 = SYNCWORD[11:8] if different from 'F', else '0'
SW3 = SYNCWORD[15:12]if different from 'F', else '0'
Figure 40: Transmitted Synchronization Header
14.14 Length field
The frame length field shown in Figure 39
defines the number of bytes in the MPDU.
Note that the length field does not include the
length field itself. It does however include the
FCS (Frame Check Sequence), even if this is
inserted automatically by CC2430 hardware.
length field is reserved [1], and should be set
to zero.
CC2430 uses the length field both for
transmission and reception, so this field must
always be included. In transmit mode, the
length field is used for underflow detection, as
described in the FIFO access section on page
157.
The length field is 7 bits and has a maximum
value of 127. The most significant bit in the
14.15 MAC protocol data unit
The FCF, data sequence number and address
information follows the length field as shown in
Figure 39. Together with the MAC data
payload and Frame Check Sequence, they
form the MAC Protocol Data Unit (MPDU).
There is no hardware support for the data
sequence number, this field must be inserted
and verified by software.
CC2430
includes
hardware
address
recognition, as described in the Address
Recognition section on page 164.
The format of the FCF is shown in Figure 41.
Please refer to [1] for details.
Bits: 0-2
3
4
5
6
7-9
10-11
12-13
14-15
Frame
Type
Security
Enabled
Frame
Pending
Acknowledge
request
Intra
PAN
Reserved
Destination
addressing
mode
Reserved
Source
addressing
mode
Figure 41: Format of the Frame Control Field (FCF) [1]
14.16 Frame check sequence
A 2-byte frame check sequence (FCS) follows
the last MAC payload byte as shown in Figure
39. The FCS is calculated over the MPDU, i.e.
the length field is not part of the FCS. This
field is automatically generated and verified by
recommended to always have this enabled,
except possibly for debug purposes. If cleared,
CRC generation and verification must be
performed by software.
The FCS polynomial is [1]:
x16 + x12 + x5 + 1
hardware
when
the
RF
register
MDMCTRL0L.AUTOCRC control bit is set. It is
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 162 of 211
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
