CC2430
Radio : Address Recognition
has been transmitted, data is fetched from the
TXFIFO.
STXONCCA command strobe will then cause
CC2430 to retransmit the last frame.
The TXFIFO can only contain one data frame
at a given time.
Writing to the TXFIFO after a frame has been
transmitted will cause the TXFIFO to be
automatically flushed before the new byte is
written. The only exception is if a TXFIFO
underflow has occurred, when a SFLUSHTX
command strobe is required.
After complete transmission of a data frame,
the TXFIFO is automatically refilled with the
last transmitted frame. Issuing a new STXONor
14.17.2 Buffered receive mode
In buffered receive mode (RX_MODE 0), the
128 byte RXFIFO, located in CC2430 RAM, is
used to buffer data received by the
demodulator. Accessing data in the RXFIFO is
described in the FIFO access section on page
157.
A DMA transfer should be used to read data
from the RXFIFO. In this case a DMA channel
can be setup to use the RADIO DMA trigger
(see DMA triggers on page 94) to initiate a
DMA transfer using the RFD register as the
DMA source.
The
RF
interrupt
and
generated
also
by
the
Multiple data frames may be in the RXFIFO
simultaneously, as long as the total number of
bytes does not exceed 128.
RFSTATUS.FIFOP
RFSTATUS.FIFO and RFSTATUS.FIFOP
register bits are used to assist the CPU in
supervising the RXFIFO. Please note that
these status bits are only related to the
RXFIFO, even if CC2430 is in transmit mode.
See the RXFIFO overflow section on page 158
for details on how a RXFIFO overflow is
detected and signaled.
14.18 Address Recognition
CC2430 includes hardware support for address
recognition, as specified in [1]. Hardware
address recognition may be enabled or
•
If a short destination address is included in
the frame, it shall match either
macShortAddress or the broadcast
address (0xFFFF). Otherwise if an
extended destination address is included
disabled
using
the
bit.
MDMCTRL0H.ADDR_DECODE
control
in
the
frame,
it
shall
match
Address recognition uses the following RF
registers
aExtendedAddress.
•
If only source addressing fields are
included in a data or MAC command
frame, the frame shall only be accepted if
the device is a PAN coordinator and the
source PAN identifier matches macPANId.
• IEEE_ADDR7-IEEE_ADDR0
• PANIDH:PANIDL
• SHORTADDRH:SHORTADDRL.
Address recognition is based on the following
requirements, listed from section 7.5.6.2 in [1]:
If any of the above requirements are not
satisfied and address recognition is enabled,
CC2430 will disregard the incoming frame and
flush the data from the RXFIFO. Only data
from the rejected frame is flushed, data from
previously accepted frames may still be in the
RXFIFO.
•
•
The frame type subfield shall not contain
an illegal frame type
If the frame type indicates that the frame is
a beacon frame, the source PAN identifier
shall match macPANId unless macPANId
is equal to 0xFFFF, in which case the
beacon frame shall be accepted
regardless of the source PAN identifier.
Incoming frames are first subject to frame type
filtering according to the setting of the
MDMCTRL0H.FRAMET_FILT register bit.
•
If a destination PAN identifier is included in
the frame, it shall match macPANId or
shall be the broadcast PAN identifier
(0xFFFF).
Following the required frame type filtering,
incoming frames with reserved frame types
(FCF frame type subfield is 4, 5, 6 or 7) are
however
accepted
if
the
RESERVED_FRAME_MODE control bit in the RF
register MDMCTRL0H is set. In this case, no
further address recognition is performed on
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 164 of 211
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