CC2430
Radio : USART
14 Radio
AUTOMATIC GAIN CONTROL
DIGITAL
DEMODULATOR
RADIO
ADC
Register bus
REGISTER
BANK
- Digital RSSI
- Gain Control
- Image Suppression
- Channel Filtering
- Demodulation
- Frame
LNA
FFCTRL
ADC
synchronization
CSMA/CA
STROBE
TXRX SWITCH
PROCESSOR
0
FREQ
SYNTH
SFR bus
90
TX POWER CONTROL
IRQ
HANDLING
DAC
DIGITAL
MODULATOR
Power
Control
- Data spreading
- Modulation
PA
Σ
DAC
Figure 32: CC2430 Radio Module
A simplified block diagram of the IEEE
802.15.4 compliant radio inside CC2430 is
shown in Figure 32. The radio core is based
on the industry leading CC2420 RF transceiver.
symbol (4 bits) is spread using the IEEE
802.15.4 spreading sequence to 32 chips and
output to the digital-to-analog converters
(DACs).
An analog low pass filter passes the signal to
the quadrature (I and Q) up-conversion mixers.
The RF signal is amplified in the power
amplifier (PA) and fed to the antenna.
CC2430 features
a
low-IF receiver. The
received RF signal is amplified by the low-
noise amplifier (LNA) and down-converted in
quadrature (I and Q) to the intermediate
frequency (IF). At IF (2 MHz), the complex I/Q
signal is filtered and amplified, and then
digitized by the RF receiver ADCs. Automatic
gain control, final channel filtering, de-
spreading, symbol correlation and byte
synchronization are performed digitally.
The internal T/R switch circuitry makes the
antenna interface and matching easy. The RF
connection is differential. A balun may be used
for single-ended antennas. The biasing of the
PA and LNA is done by connecting
TXRX_SWITCH to RF_P and RF_N through an
external DC path.
An interrupt indicates that a start of frame
delimiter has been detected. CC2430 buffers
the received data in a 128 byte receive FIFO.
The user may read the FIFO through an SFR
interface. It is recommended to use direct
memory access (DMA) to move data between
memory and the FIFO.
The frequency synthesizer includes
a
completely on-chip LC VCO and a 90 degrees
phase splitter for generating the I and Q LO
signals to the down-conversion mixers in
receive mode and up-conversion mixers in
transmit mode. The VCO operates in the
frequency range 4800 – 4966 MHz, and the
frequency is divided by two when split into I
and Q signals.
CRC is verified in hardware. RSSI and
correlation values are appended to the frame.
Clear channel assessment, CCA, is available
through an interrupt in receive mode.
The digital baseband includes support for
frame handling, address recognition, data
buffering, CSMA-CA strobe processor and
MAC security.
The CC2430 transmitter is based on direct up-
conversion. The data is buffered in a 128 byte
transmit FIFO (separate from the receive
FIFO). The preamble and start of frame
delimiter are generated in hardware. Each
An on-chip voltage regulator delivers the
regulated 1.8 V supply voltage.
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 153 of 211
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