CC2430
Peripherals
U0GCR (0xC5) – USART 0 Generic Control
: USART
Bit
Name
Reset
R/W
Description
SPI clock polarity
7
0
R/W
CPOL
0
1
Negative clock polarity
Positive clock polarity
6
0
R/W
SPI clock phase
CPHA
0
1
Data is output on MOSI when SCK goes from CPOL inverted
to CPOL, and data input is sampled on MISO when SCK goes
from CPOL to CPOL inverted.
Data is output on MOSI when SCK goes from CPOL to CPOL
inverted, and data input is sampled on MISO when SCK goes
from CPOL inverted to CPOL.
5
0
R/W
R/W
Bit order for transfers
ORDER
0
1
LSB first
MSB first
4:0
0x00
Baud rate exponent value. BAUD_E along with BAUD_M decides
the UART baud rate and the SPI master SCK clock frequency
BAUD_E[4:0]
U0DBUF (0xC1) – USART 0 Receive/Transmit Data Buffer
Bit
Name
Reset
R/W
Description
7:0
0x00
R/W
USART receive and transmit data. When writing this register the
data written is written to the internal, transmit data register. When
reading this register, the data from the internal read data register is
read.
DATA[7:0]
U0BAUD (0xC2) – USART 0 Baud Rate Control
Bit
Name
Reset
R/W
Description
7:0
0x00
R/W
Baud rate mantissa value. BAUD_E along with BAUD_M decides
the UART baud rate and the SPI master SCK clock frequency
BAUD_M[7:0]
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 149 of 211
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
