CC1110Fx / CC1111Fx
by interrupt IN endpoints that are used to
communicate rate feedback for Isochronous
endpoints.
controller will respond with
a
STALL
handshake when the host is done sending the
data packet. The data packet is discarded and
is not placed in the OUT FIFO. The USB
A Bulk/Interrupt IN endpoint can be stalled by
setting the USBCSIL.SEND_STALL bit to 1.
When the endpoint is stalled, the USB
controller
will
assert
the
USBCSOL.SENT_STALL bit when the STALL
handshake is sent and generate an interrupt
request if the OUT endpoint interrupt is
enabled.
controller will respond with
handshake to IN tokens.
a
STALL
The
USBCSIL.SENT_STALL bit will then be set
As the AutoSet feature is useful for bulk IN
endpoints, the AutoClear feature is useful for
OUT endpoints since many packets will be of
maximum size.
and an interrupt will be generated, if enabled.
A bulk transfer longer than the maximum
packet size is performed by splitting the
transfer into a number of data packets of
maximum size followed by a smaller data
packet containing the remaining bytes. If the
transfer length is a multiple of the maximum
packet size, a zero length data packet is sent
last. This means that a packet with a size less
than the maximum packet size denotes the
end of the transfer. The AutoSet feature can
be useful in this case, since many data
packets will be of maximum size.
13.16.6.8 Isochronous OUT Endpoint
An Isochronous OUT endpoint is used to
transfer periodic data from the host to the USB
controller (one data packet every USB frame).
If there is no buffer available when a data
packet
is
being
received,
the
USBCSOL.OVERRUN bit will be asserted and
the packet data will be lost. Firmware can
reduce the chance for this to happen by using
double buffering and use DMA to effectively
unload data packets.
13.16.6.6 Isochronous IN Endpoint
An Isochronous IN endpoint is used to transfer
periodic data from the USB controller to the
host (one data packet every USB frame).
An isochronous data packet in the OUT FIFO
may have bit errors. The hardware will detect
this condition and set USBCSOL.DATA_ERROR.
Firmware should therefore always check this
bit when unloading a data packet.
If there is no data packet loaded in the IN FIFO
when the USB host requests data, the USB
controller sends a zero length data packet and
the USBCSIL.UNDERRUNbit will be asserted.
The AutoClear feature will typically not be used
for isochronous endpoints since the packet
size will increase or decrease from frame to
frame.
Double buffering requires that a data packet is
loaded into the IN FIFO during the frame
preceding the frame where it should be sent. If
the first data packet is loaded before an IN
token is received, the data packet will be sent
during the same frame as it was loaded and
hence violate the double buffering strategy.
Thus, when double buffering is used, the
USBPOW.ISO_WAIT_SOF bit should be set to
1 to avoid this. Setting this bit will ensure that a
loaded data packet is not sent until the next
SOF token has been received.
13.16.7 DMA
DMA should be used to fill the IN endpoint
FIFOs and empty the OUT endpoint FIFOs.
Using DMA will improve the read/write
performance significantly compared to using
the 8051 CPU. It is therefore highly
recommended to use DMA unless timing is not
critical or only a few bytes are to be
transferred.
The AutoSet feature will typically not be used
for isochronous endpoints since the packet
size will increase or decrease from frame to
frame.
There are no DMA triggers for the USB
controller, meaning that DMA transfers must
be triggered by firmware.
The word size can be byte (8 bits) or word (16
bits). When word size transfer is used the
ENDIAN register must be set correctly (see
section 11.2.3.6). The ENDIAN.USBRLE bit
selects whether a word is read as little or big
endian from the OUT FIFOs and the
ENDIAN.USBWLEbit selects whether a word is
written as little or big endian to the IN FIFOs.
13.16.6.7 Bulk/Interrupt OUT Endpoint
Interrupt OUT transfers occur at regular
intervals while bulk OUT transfers utilize
available
bandwidth
not
allocated
to
isochronous, interrupt, or control transfers.
A Bulk/Interrupt OUT endpoint can be stalled
by setting the USBCSOL.SEND_STALL bit to
1. When the endpoint is stalled, the USB
SWRS033E
Page 175 of 239
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