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SM8958A 参数 Datasheet PDF下载

SM8958A图片预览
型号: SM8958A
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,具有32KB闪存和1KB RAM的嵌入式 [8-Bits Micro-controller With 32KB flash & 1KB RAM embedded]
分类和应用: 闪存微控制器
文件页数/大小: 23 页 / 888 K
品牌: SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
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SyncMOS Technologies International, Inc.
SM8958A
8-Bits Micro-controller
With 32KB flash & 1KB RAM embedded
1.3 I/O Pin Configuration
The ports 1, 2 and 3 of standard 8051 have internal pull-up resistor, and port 0 has open-drain outputs. Each I/O pin
can be used independently as an input or an output. For I/O ports to be used as an input pin, the port bit latch must
contain a ‘1’ which turns off the output driver FET. Then for port 1, 2 and 3 port pin is pulled high by a weak internal
pull-up, and can be pulled low by an external source. The port 0 has open-drain outputs which means its pull-ups are
not active during normal port operation. Writing ‘1’ to the port 0 bit latch will causing bit floating so that it can be used as
a high-impedance input.
The port 4 used as GPIO will has the same function as port 1, 2 and 3.
2. Port 4 for PLCC or QFP package :
The bit addressable port 4 is available with PLCC or QFP package. The port 4 has only 4 pins and its port address is
located at 0D8H. The function of port 4 is the same as the function of port 1, port 2 and port 3.
Port4 (P4, $D8)
bit-7
Unused
Read / Write:
Reset value:
-
*
Unused
-
*
Unused
-
*
Unused
-
*
P4.3
R/W
1
P4.2
R/W
1
P4.1
R/W
1
bit-0
P4.0
R/W
1
The bit 3, bit 2, bit 1, bit 0 output the setting to pin P4.3, P4.2, P4.1, P4.0 respectively.
3.Watch Dog Timer
The Watch Dog Timer (WDT) is a 16-bit free-running counter that generate reset signal if the counter overflows. The
WDT is useful for systems which are susceptible to noise, power glitches, or electronics discharge which causing
software dead loop or runaway. The WDT function can help user software recover from abnormal software condition.
The WDT is different from Timer0, Timer1 and Timer2 of general 8052. To prevent a WDT reset can be done by
software periodically clearing the WDT counter. User should check WDR bit of SCONF register whenever un-predicted
reset happened
The purpose of the secure procedure is to prevent the WDTC value from being changed when system runaway.
Specifications subject to change without notice contact your sales representatives for the most recent information.
9
Ver 2.1
SM8958A
08/2006