SyncMOS Technologies International, Inc.
SM8958A
8-Bits Micro-controller
With 32KB flash & 1KB RAM embedded
5.2 SPWM Registers - P1CON, SPWMC, SPWMD[4:0]
SPWM Registers - Port1 Configuration Register (P1CON, $9B)
bit-7
bit-0
SPWME4 SPWME3 SPWME2 SPWME1 SPWME0
Unused
Unused
Unused
Read / Write:
Reset value:
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
-
*
-
*
-
*
SPWME[4:0] : When the bit set to one, the corresponding SPWM pin is active as SPWM function. When the bit reset to
zero, the corresponding SPWM pin is active as I/O pin. Five bits are cleared upon reset.
SPWM Registers -SPWM Control Register (SPWMC, $A3)
bit-7
bit-0
Unused
Unused
Unused
Unused
Unused
Unused
SPFS1
R/W
0
SPFS0
R/W
0
Read / Write:
Reset value:
-
*
-
*
-
*
-
*
-
*
-
*
SPFS[1:0] : These two bits is 2’s power parameter to form a frequency divider for input clock.
SPFS1
SPFS0
Divider
SPWM clock, Fosc=20MHz
SPWM clock, Fosc=24MHz
0
0
1
1
0
1
0
1
2
4
8
10MHz
5MHz
2.5MHz
1.25MHz
12MHz
6MHz
3MHz
16
1.5MHz
SPWM Registers -SPWM Data Register (SPWMD[4:0], $AC, $A7 ~$A4)
bit-7
bit-0
SPWMD
[4:0]4
R/W
SPWMD
[4:0]3
R/W
SPWMD
[4:0]2
R/W
SPWMD
[4:0]1
R/W
SPWMD
[4:0]0
R/W
BRM
BRM
BRM
[2:0]2
[2:0]1
[2:0]0
Read / Write:
Reset value:
R/W
0
R/W
0
R/W
0
0
0
0
0
0
SPWMD[4:0] : content of SPWM Data Register. It determines duty cycle of SPWM output waveform.
BRM[2:0] : will insert certain narrow pulses among an 8-SPWM-cycle frame
Specifications subject to change without notice contact your sales representatives for the most recent information.
Ver 2.1 SM8958A 08/2006
12
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
