HV582
Pin List
Name
CLK
LE
RESET
DIR
POL
OE
OLB
OHB
DR
INA
, DR
INB
, DG
INA
,
DG
INB
, DB
INA
, DB
INB
DR
OUTA
, DR
OUTB
, DG
OUTA
,
DG
OUTB
, DB
OUTA
, DB
OUTB
HV
OUT
1-96
GND
V
DD
HVGND
V
PP
Function
Shift register clock
Transparent latch enable input
Power on reset
Shift register direction input
Polarity input
High impedance control
All outputs low
All outputs high
Description
Rising edge triggered
L = Hold data, H = Transparent
1 = Resets all shift registers and latches to Low
L = CCW, Q96->Q1; H = CW, Q1->Q96
Invert output of latches
L = HV output in Hi-Z state, H = normal
Active low
Active low
Red/green/blue A/B input/output DIR = 0 "input", DIR = 1 "output"
Red/green/blue A/B output/input DIR = 0 "output", DIR = 1 "input"
High voltage outputs
Logic ground
Logic power
High voltage ground
High voltage power
09/16/02rev.2
©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
8
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com