SMS66
Preliminary Information
I2C PROGRAMMING INFORMATION
SERIAL INTERFACE
The SMS66 halts the monitor function from when it
acknowledges the address byte until a valid stop is
received.
WRITE
Access to the configuration registers, general-purpose
memory and command and status registers is carried
out over an industry standard 2-wire serial interface
(I2C). SDA is a bi-directional data line and SCL is a
clock input. Data is clocked in on the rising edge of
SCL and clocked out on the falling edge of SCL. All
data transfers begin with the MSB. During data
transfers SDA must remain stable while SCL is high.
Data is transferred in 8-bit packets with an intervening
clock period in which an Acknowledge is provided by
Writing to the memory or a configuration register is
illustrated in Figures 8, 9, 11, 13 and 14. A Start
condition followed by the address byte is provided by
the host; the SMS66 responds with an Acknowledge;
the host then responds by sending the memory
address pointer or configuration register address
pointer; the SMS66 responds with an acknowledge;
the host then clocks in on byte of data. For memory
and configuration register writes, up to 15 additional
bytes of data can be clocked in by the host to write to
consecutive addresses within the same page. After
the last byte is clocked in and the host receives an
Acknowledge, a Stop condition must be issued to
initiate the nonvolatile write operation.
the device receiving data. The SCL high period (tHIGH
)
is used for generating Start and Stop conditions that
precede and end most transactions on the serial bus.
A high-to-low transition of SDA while SCL is high is
considered a Start condition while a low-to-high
transition of SDA while SCL is high is considered a
Stop condition.
The interface protocol allows operation of multiple
READ
devices and types of devices on a single bus through
The address pointer for the configuration registers,
memory, command and status registers and ADC
registers must be set before data can be read from the
SMS66. This is accomplished by a issuing a dummy
write command, which is simply a write command that
is not followed by a Stop condition. The dummy write
command sets the address from which data is read.
After the dummy write command is issued, a Start
command followed by the address byte is sent from
the host. The host then waits for an Acknowledge and
then begins clocking data out of the slave device. The
first byte read is data from the address pointer set
during the dummy write command. Additional bytes
can be clocked out of consecutive addresses with the
host providing an Acknowledge after each byte. After
the data is read from the desired registers, the read
operation is terminated by the host holding SDA high
during the Acknowledge clock cycle and then issuing a
Stop condition. Refer to Figures 10, 12 and 15 for an
illustration of the read sequence.
unique device addressing.
The address byte is
comprised of a 4-bit device type identifier (slave
address) and a 3-bit bus address. The remaining bit
indicates either a read or a write operation. Refer to
Table 1 for a description of the address bytes used by
the SMS66.
The device type identifier for the memory array is
generally set to 1010BIN following the industry standard
for a typical nonvolatile memory. There is an option to
change the identifier to 1011BIN allowing it to be used
on a bus that may be occupied by other memory
devices. The configuration registers are grouped with
the memory array and thus use 1010BIN or 1011BIN as
the device type identifier. The command and status
registers as well as the 10-bit ADC are accessible with
the separate device type identifier of 1001BIN
.
The bus address bits A1 and A0 are programmed into
the configuration registers. Bus address bit A[2] can
be programmed as either 0 or biased by the A2 pin.
The bus address accessed in the address byte of the
serial data stream must match the setting in the
SMS66 and on the A2 pin.
Any access to the SMS66 on the I2C bus will
temporarily halt the monitoring function. This is true
not only during the monitor mode, but also during
Power-on and Power-off sequencing when the device
is monitoring the channels to determine if they have
turned on or turned off.
WRITE PROTECTION
The SMS66 powers up into a write protected mode.
Writing a code to the volatile write protection register
can disable the write protection. The write protection
register is located at address 87HEX of slave address
1001BIN
.
Writing 0101BIN to bits [7:4] of the write protection
register allow writes to the general-purpose memory
while writing 0101BIN to bits [3:0] allow writes to the
configuration registers. The write protection can re-
Summit Microelectronics, Inc
2070 1.0 7/16/03
18
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
