SMS66
Preliminary Information
I2C PROGRAMMING INFORMATION (CONTINUED)
S
T
S
T
A
Configuration
Register Address
R
O
P
Master
Slave
Bus Address
Data
T
S
A
0
0
A
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
D
7
D
6
D
5
D
D
3
D
2
D
D
0
1
0
1
0
/
W
2
4
1
1
A
C
K
A
C
K
A
C
K
Figure 13 – General Purpose Memory Byte Write
S
T
A
R
T
Configuration
Register Address
Master
Bus Address
Data (1)
S
A
0
0
A
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1
0
1
0
/
W
2
1
Slave
A
C
K
A
C
K
A
C
K
S
T
O
P
Master
Slave
Data (2)
Data (16)
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
C
K
A
C
K
A
C
K
Figure 14 - General Purpose Memory Page Write
S
T
S
T
A
R
T
A
Configuration
Register Address
R
Master
Bus Address
Bus Address
T
S
A
0
0
S
A
0
0
A
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
A
1
0
1
0
/
W
1
0
1
0
/
R
2
2
1
1
Slave
A
C
K
A
C
K
A
C
K
N
A
C
K
S
T
A
C
K
A
C
K
O
P
Master
Slave
Data (1)
Data (n)
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Figure 15 - General Purpose Memory Read
Summit Microelectronics, Inc
2070 1.0 7/16/03
22
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
