SML2108
PRELIMINARY
V
The built-in integration time constant is nominally 1ms.
This is accomplished by using an internal 2MΩ resistor
and 500pF capacitor. The time constant can be modified
by adding external capacitance between the CAP1 and
CAP2 terminals, and/or by adding external resistance
between the DETECT and CAP1 terminals. For stability
reasons it is not recommended that the time constant be
decreased to less than 100us.
DD
I
Source
BIAS
0 to 10 mA or
0 to 100 mA
BIASP
ADC
Input
The output of an internal 10-Bit DAC biases the positive
terminaloftheintegratingamplifier. ThisDACprovidesan
analog reference to the integrator which is useful for initial
calibration of the laser module. The full-scale value of the
DAC output is 1.5V.
From MPC
Integrator
BIAS
CONTROL
BIASN
Sink
I
BIAS
10-Bit Bias Control D/A
0 to 100 mA
The 10-Bit D/A determines the reference voltage of the
non-inverting terminal of the integrating amplifier in the
mean power control loop. Associated with this DAC are a
10-Bit volatile register and a 10-Bit nonvolatile (NV) regis-
ter. The content of the volatile register determines the
DAC output voltage. The DAC output voltage is given by
the following relation:
2053 Fig02
Figure 2. Output Block 1: Mean Power Control
V
DD
I
Source
MOD
X
0 to 10 mA or
0 to 100 mA
OV =
×1.5V
1024
MODP
where X = the decimal equivalent of the 10-Bit data stored
in the volatile register. Note that the DAC output voltage
is not directly accessible external to the chip. However,
whentheSML2108isplacedinatypicalapplicationcircuit,
the mean power control feedback loop forces the voltage
at the DETECT pin to be the same as the DAC output. On
device power-up the volatile register may be loaded with
all zeroes, or it may be loaded from the contents of the 10-
Bit nonvolatile register.
From I
MOD
CONTROL
MOD
DAC
MODN
I
Sink
0 to 100 mA
MOD
Access to the 10-Bit volatile register is obtained via the 2-
wire interface at slave address 1001BIN, word address 0.
Refer to Figures 9, 10, 12, and 13 for details on program-
ming and reading data from the 10-Bit register. When
writing to the volatile register the new DAC output will
become valid immediately at the end of the write com-
mand. Reading the volatile register has no effect on the
DACoutput. Readingorwritingthevolatileregisterhasno
effect on the contents of the nonvolatile register.
2053 Fig03
Figure 3. Output Block 2: IMOD
thevolatileregister,exceptwordaddress2isusedinstead
of 0. When reading the NV register, the data is first
transferred into the volatile register where it may be
accessed by the serial interface. Note that upon this
transfer the DAC output will change immediately to reflect
the new data. Similarly, when writing to the NV register,
The 10-Bit NV register can only be accessed indirectly
through the volatile register. The command sequence to
communicate with the NV register is the same as that of
SUMMIT MICROELECTRONICS, Inc.
2053 2.2 11/07/00
8
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
