SML2108
PRELIMINARY
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
Maximum bias and modulation
current
VDD
Supply voltage
3
5.5
V
Bias and modulation current out-
puts open
ID
Supply current
2
mA
ILO
ILI
Input leakage current
VIN = 0V to VDD
1
µA
µA
V
Output leakage current VOUT = 0V to VDD
10
0.4
VOL
Output low voltage
IOL = 2mA
VDD = 5V, IOL = –400µA
2.4
V
VOH
Output high voltage
VDD < 4.5V, IOL = –100µA
VDD – 0.2
–0.1
V
VIL
VIH
Input low voltage
Input high voltage
0.3 × VDD
V
0.7 × VDD
0.5
V
Integrator loop
frequency
fINT
1
kHz
ms
Power up stabilization Integrator time constant is less
time
tPUS
10
than 10ms
Analog Inputs
DETECT DETECT input to ADC
IEXT TEMP Full scale current input
Analog Outputs
0
1.5
V
390.6
µA
N-channel modulation
current
IMODN
0
0
–100
mA
mA
P-channel modulation
current
IMODP
100
IBIASN
IBIASP
VDAC
N-channel bias current
P-channel bias current
10-Bit DAC output
0
0
0
–100
100
1.5
mA
mA
V
Digital Outputs
Open drain ALERT output is
active
ALERT
ALERT output
5
mA
2053 Elect Table B
SUMMIT MICROELECTRONICS, Inc.
2053 2.2 11/07/00
6
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
