SMH4812
Preliminary
16 PIN SOIC PACKAGE
.0085 ± .0010
(After Plating)
0.390 ± 0.005
16
9
0.151 ± 0.005
155 ± 0.005
Pin 1 Index
1
8
0 ± 8
0.05 BSC
0.016 ± 0.003
DETAIL A
.016 ±.002 0.024 ± 0.002
45 ± 1
7 ± 1
7 ± 1
0.054 ± 0.005
0.069 MAX
.004
0.007 ± 0.003
0.023 ± 0.005
7 ± 1
.007 ± .003
0.390 ± 0.005
0.041
DETAIL A
Note:
1. Reference: JEDEC publication MS-012 PTX 360-120
2. Unit: Inches
2055 SOIC 1.0
3. Mold flash, protrusion & gate burr shall not exceed 0.006 inch per side.
SUMMIT MICROELECTRONICS, Inc.
2055 4.0 12/22/00
18