SMH4042A
PIN DESCRIPTIONS
HST_3V_MON(23)
A0 (8)
Address 0 is not used by the memory array. It can be This input monitors the host 3.3V supply and it is used as
connected to ground or left floating. It must not be a reference for the circuit breaker comparator. If VCC3
connected VCC
.
falls below VTRIP then SGNL_VLD# is de-asserted, the
high side drivers are disabled, and LOCAL_PCI_RST# is
asserted.
A1, A2 (10, 11)
Address inputs 1 and 2 are used to set the two-bit device
address of the memory array. The state of these inputs
ISLEW (3)
will determine the device address for the memory if it is A Diode-connected NFET input. It may be used to adjust
on a two-wire bus with multiple memories with the same the 250V/s default slew rate of the high-side driver
device type identifier.
outputs.
SCL (19)
PCI_RST# (17)
The SCL input is used to clock data into and out of the A TTL level reset input signal from the host interface. A
memoryarray. Inthewritemode,datamustremainstable high to low transition (held low longer than 40ns) will
while SCL is HIGH. In the read mode, data is clocked out initiate a reset sequence. The LOCAL_PCI_RST# and
on the falling edge of SCL.
LOCAL_PCI_RST outputs will be driven active for a
minimum period of tPURST. If the PCI_RST# input is still
held low after tPURST times out the reset outputs will
SDA (18)
TheSDApinisabidirectionalpinusedtotransferdatainto continue to be driven until PCI_RST# is released.
and out of the memory array. Data changing from one
state to the other may occur only when SCL is LOW,
PWR_EN (7)
except when generating START or STOP conditions. A TTL level input that allows the host to enable or disable
SDA is an open-drain output and may be wire-ORed with the power to the individual card. During initial power up
any number of open-drain outputs.
this signal would start in a low state, and then be driven
high during software initialization. If this signal is driven
low then the power supply control outputs will be driven
CARD_3V_MON (21)
This input monitors the card-side 3.3V supply. If the input into the inactive state and the reset signals asserted. In
falls below VTRIP then the HEALTHY# and SGNL_VLD# a “non-High Availability” system this input can be tied
high. The PWR_EN input is also used to reset the
SMH4042A circuit breakers. After an over-current condi-
tion is detected the VGATE outputs can be turned back
on by first taking PWR_EN low then returning it high.
outputs are de-asserted and the reset outputs are driven
active.
CARD_5V_MON (25)
This input monitors the card-side 5V supply. If the input
falls below VTRIP then the HEALTHY# and SGNL_VLD#
VSEL (6)
outputs are de-asserted and the reset outputs are driven A TTL level input used to determine which of the host
active.
powersupplyinputswillbemonitoredforvalidvoltageand
reset generation. This is a static input and the pin should
be tied to VCC or ground through a resistor. VSEL is high
CBI_3 (24)
CBI_3 is the circuit breaker input for the low supply. With for 3.3V power. VSEL is low for 5V or mixed mode power.
a series resistor placed in the supply path between VCC3
and CBI_3, the circuit breaker will trip whenever the VCC (28)
voltage across the resistor exceeds 50mV.
Thepowersupplyinput. Itismonitoredforpowerintegrity.
If it falls below the 5V sense threshold (VTRIP) and the
VSEL input is low then the SGNL_VLD# and HEALTHY#
signals are de-asserted, the high side drivers disabled,
CBI_5 (1)
CBI_5 is the circuit breaker input for the supply voltage.
With a series resistor placed in the supply path between
andresetoutputsasserted. OnaCompactPCIboardthis
the 5V early power and CBI_5, the circuit breaker will trip
must be connected to early power.
whenever the voltage across the resistor exceeds 50mV.
SUMMIT MICROELECTRONICS, Inc.
2070 9.1 5/27/03
3
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
