S93462/S93463
SK
t
CS
STANDBY
CS
DI
STATUS
VERIFY
BUSY
A
N
A
N-1
A
0
D
N
D
0
1
0
1
t
t
HZ
SV
HIGH-Z
DO
READY
HIGH-Z
t
EW
2021 ILL 5 1.0
Figure 3. Write Instruction Timing
SK
STANDBY
STATUS VERIFY
CS
DI
t
CS
A
N
A
0
A
N-1
1
1
1
t
t
SV
HZ
HIGH-Z
DO
BUSY
EW
READY
HIGH-Z
t
2021 ILL6 1.0
Figure 4. Erase Instruction Timing
SK
STANDBY
CS
DI
1
0
0
*
* ENABLE = 11
DISABLE = 00
2021 Fig05
Figure 5. EWEN/EWDS Instruction Timing
5
Summit Microelectronics, Inc.
2021 4.2 1/23/01